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LC-30HV4E 1st Edition SERVICE MANUAL LCD COLOUR TELEVISION MODEL LC-30HV4E In the interests of user-safety (Required by safety regulations in some countries) the set should be restored to its original condition and only parts identical to those specified should be used. CONTENTS Page Page » » » » » » » » » » » » » IMPORTANT SERVICE SAFETY PRECAUTION ..... 2 SPECIFICATIONS................................................ 3 OPERATION MANUAL ........................................ 4 DIMENSIONS .................................................... 10 REMOVING OF MAJOR PARTS ........................ 12 ADJUSTMENT PROCEDURES (AVC System) .. 19 UPGRADING INSTALLED PROGRAMS ........... 26 ADJUSTMENT PROCEDURES (Display) ......... 29 MAJOR IC INFORMATIONS .............................. 33 TROUBLE SHOOTING TABLE .......................... 52 CHASSIS LAYOUT ............................................. 62 SYSTEM BLOCK DIAGRAM (AVC System) ...... 66 SIGNAL FLOW BLOCK DIAGRAM (AVC System) ..................................................... 68 » POWER SYSTEM BLOCK DIAGRAM (AVC System) ..................................................... 70 » PC I/F BLOCK DIAGRAM (AVC System) .......... 72 » SIGNAL BLOCK DIAGRAM (Display) ................ 74 » POWER UNIT BLOCK DIAGRAM (Display) ...... 76 » OVERALL WIRING DIAGRAM (AVC System) ... 78 » OVERALL WIRING DIAGRAM (Display) ............ 82 » DESCRIPTION OF SCHEMATIC DIAGRAM ..... 84 » WAVEFORMS .................................................... 85 » SCHEMATIC DIAGRAM ..................................... 86 » PRINTED WIRING BOARD ASSEMBLIES...... 159 » PARTS LIST ..................................................... 204 » PACKING OF THE SET ................................... 246 SHARP CORPORATION LC-30HV4E IMPORTANT SERVICE SAFETY PRECAUTION Ë Service work should be perfomed only by qualified service technicians who are thoroughly familiar with all safety checks and the servicing guidelines which follow: » Use an AC voltmeter having with 5000 ohm per volt, or higher, sensitivity or measure the AC voltage drop across the resisor. » Connect the resistor connection to all exposed metal parts having a return to the chassis (antenna, metal cabinet, screw heads, knobs and control shafts, escutcheon, etc.) and measure the AC voltage drop across the resistor. All checks must be repeated with the AC cord plug connection reversed. (If necessary, a nonpolarized adaptor plug must be used only for the purpose of completing these checks.) Any reading of 35V peak (this corresponds to 0.7 milliamp. peak AC.) or more is excessive and indicates a potential shock hazard which must be corrected before returning the monitor to the owner. WARNING 1. For continued safety, no modification of any circuit should be attempted. 2. Disconnect AC power before servicing. CAUTION: FOR CONTINUED PROTECTION AGAINST A RISK OF FIRE REPLACE ONLY WITH SAME TYPE FUSE. AVC SIDE: F701 (T2A, 250V), F702 (T2A, 250V), F1702 (T4AL, 250V) FUSE. LCD SIDE: F1(T3.15AL, 250V), F6551, F6552, F6553, F6554, F6555, F6556 (T2.5AL, 250V) BEFORE RETURNING THE RECEIVER (Fire & Shock Hazard) Before returning the receiver to the user, perform the following safety checks: 1. Inspect all lead dress to make certain that leads are not pinched, and check that hardware is not lodged between the chassis and other metal parts in the receiver. 2. Inspect all protective devices such as non-metallic control knobs, insulation materials, cabinet backs, adjustment and compartment covers or shields, isolation resistor-capacitor networks, mechanical insulators, etc. 3. To be sure that no shock hazard exists, check for leakage current in the following manner. » Plug the AC cord directly into a 110~240 volt AC outlet, and connect the DC power cable into the receiver's DC jack. (Do not use an isolation transformer for this test). » Using two clip leads, connect a 1.5k ohm, 10 watt resistor paralleled by a 0.15µF capacitor in series with all exposed metal cabinet parts and a known earth ground, such as electrical conduit or electrical ground connected to an earth ground. DVM AC SCALE 50k ohm 10W 0.15 µF TEST PROBE TO EXPOSED METAL PARTS CONNECT TO KNOWN EARTH GROUND 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212 SAFETY NOTICE and shaded areas in the Replacement Parts List and Schematic Diagrams. For continued protection, replacement parts must be identical to those used in the original circuit. The use of a substitute replacement parts which do not have the same safety characteristics as the factory recommended replacement parts shown in this service manual, may create shock, fire or other hazards. Many electrical and mechanical parts in Plasma Display television have special safety-related characteristics. These characteristics are often not evident from visual inspection, nor can protection afforded by them be necessarily increased by using replacement components rated for higher voltage, wattage, etc. Replacement parts which have these special safety characteristics are identified in this manual; electrical components having such features are identified by “ å” 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212 2 LC-30HV4E SPECIFICATIONS Item 30"LCD COLOUR TV, Model:LC-30HV4E LCD panel 30"Advanced Super View & BLACK TFT LCD Number of dots 2,949,120 dots (1280 × 768 × 3 dots) Video Colour System PAL/SECAM/NTSC 3.58/NTSC 4.43/PAL 60 TV Function TV-standard (CCIR) B/G, D/K, I, L/L’ Receiving Channel VHF/UHF E2–E69ch, F2–F10ch, I21–I69ch, IR A–IR Jch CATV Hyper-band, S1–S41ch TV-Tuning System Auto Preset 99 ch, Auto Label, Auto Sort STEREO/BILINGAL NICAM/IGR Brightness 430 cd/m2 Backlight 60,000 hours (at Save1) Viewing angles H : 170° V : 170° Audio amplifier 10W × 2 Speakers Ø 8 cm Terminals AVC Rear System 2pcs INPUT 1 SCART (AV in, RGB in, TV out) INPUT 2 SCART (AV in/out, S-VIDEO in, AV Link) INPUT 3 SCART (AV in/out, S-VIDEO in, RGB in), Component ANTENNA 75 Ω Din Type AV OUTPUT Audio (Variable, Fixed), S-VIDEO out, AV out DC OUTPUT DC6.5V 7W MAX Front INPUT 4 S-VIDEO, AV in PC 15 Pin mini D-Sub, Audio in (Ø 3.5mm jack) Headphones Ø 3.5mm jack OSD language English/German/French/Italian/Spanish/Dutch/Swedish/Portuguese/Greek/ Finnish/Russian/Turkish Power Requirement AC 220–240 V, 50/60 Hz AVC System Power Consumption Display 32 W (0.7 W Standby) Weight 109 W (0.9 W Standby) (Method IEC60107) AVC System 5.4 kg (w/o stand), 5.5 kg (with stand) Display 15.7 kg (w/o stand), 19.5 kg (with stand) Accessories Operation manual, Remote control unit ( × 1), System cable ( × 1), AC cord ( × 2), LR6 (“AA” size) Alkaline battery ( × 2), Stand unit ( × 1), Cable clamp ( × 1) 3 Display Part names 4 MAIN POWER button OPC indicator* Remote control sensor indicator STANDBY/ON button ( ) INPUT button STANDBY/ON indicator OPC sensor Remote control sensor CHANNEL buttons (CH / ) VOLUME buttons ( / ) *OPC: Optical Picture Control (See Pages 36 and 38.) CLEAR* INPUT 4 terminal (S-VIDEO) INPUT 4 terminals (AUDIO) (How to open the door) Headphone (When connecting headphones, the sound from the speakers is muted.) AV MODE resets to STANDARD. TV channel resets to channel 1. Dual screen resets to normal. Audio setting initialises. SRS resets to OFF. Image position is initialised. AC INPUT terminal DISPLAY OUTPUT2 terminal DISPLAY OUTPUT1 terminal RS-232C terminal DC OUTPUT terminal (Terminal for expanded functionality in the near future.) INPUT 1 terminal (SCART) INPUT 2 terminal (SCART) AV OUTPUT terminals (AUDIO) AV OUTPUT terminal (VIDEO) AV OUTPUT terminal (S-VIDEO) INPUT 3 terminal (SCART) INPUT 3 terminals (Y, PB(CB), PR(CR)) ANTENNA INPUT terminal Rear view NOTE • Pressing CLEAR will not work if the System is in standby mode (indicator lights red). • Pressing CLEAR will not delete channel preset or password. See page 60 for clearing the password when you know it. See page for initialising to the factor y preset values when you forget your password. • • • • • • * If the AVC System is switched on but it does not appear to be operating correctly, it may need resetting. In this case, press CLEAR, shown in the diagram, lightly with the end of a ballpoint pen or other pointed object. This will reset the System as shown below. POWER button PC INPUT terminal (ANALOG RGB) PC INPUT terminal (AUDIO) INPUT 4 terminal (VIDEO) STANDBY/ON indicator Front view AVC System LC-30HV4E OPERATION MANUAL 25 20 21 22 23 24 18 19 17 NOTE • When using the remote control unit, point it at the Display. * is a trademark of SRS Labs, Inc. FOCUS technology is incorporated under license from SRS Labs, Inc. 10 11 12 1 2 3 4 5 6 7 8 9 13 14 15 16 5 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 (INPUT SOURCE) Select an input source. (TV, INPUT 1, INPUT 2, INPUT 3, INPUT 4, PC) SLEEP Set the Sleep timer. (MUTE) Mute the sound. 0–9 TV/External input mode: Set the channel. TELETEXT mode: Set the page. (Digit for channel select) Change the digits of the selected TV channel. Colour (RED/GREEN/YELLOW/BLUE) TELETEXT mode: Select a page. CH /CH ( / ) TV/External input mode: Select the channel. TELETEXT mode: Set the page. (TOP Overview for TELETEXT) TELETEXT mode: Display an index page for CEEFAX/FLOF information. TOP Overview for TOP programme. (TELETEXT) Select the TELETEXT mode. (all TV image, all TEXT image, TV/TEXT image) RETURN MENU mode: Return to the previous menu screen. ENTER Execute a command. Return to the initial image position after moving with / / / . / / / (Cursor) Select a desired item on the setting screen. Move the picture on the screen. MENU Display the MENU screen. (CHANNEL INFORMATION) Display the channel information and time. / (VOLUME) Set the volume. (Reveal hidden for TELETEXT) TELETEXT mode: Display hidden characters. (SUBPAGE for TELETEXT) TELETEXT mode: Change the picture mode for sub-page selecting. TELETEXT mode: Set the area of magnification. (full/upper half/ lower half) AV MODE Select a video setting: AV MODE (STANDARD, DYNAMIC, MOVIE, GAME, USER), PC MODE (STANDARD, USER) (See page 51.) SOUND Select the sound multiplex mode. (SRS and FOCUS)* Select SRS and FOCUS sound system. (Flashback) Press to return to the previous channel in normal viewing mode. Press to return to the previous page in TELETEXT mode. (STANDBY/ON) To switch the power on and off. (FREEZE/HOLD for TELETEXT) TV/External input mode: Change the still image mode. TELETEXT mode: Freeze a multi-page on screen while other pages are automatically updated. Press again to return to the normal image. (DUAL screen) Set the dual picture mode. Press again to return to normal view. (See page 61.) (WIDE MODE/ T/B/F) TV/External input mode: Change the wide image mode. DISPLAY INPUT1 System cable DISPLAY INPUT2 (WHITE) Connect the plug into the terminal and secure it by tightening the thumb screws. AC cord (GREY) AC cord (WHITE) System cable • TO PREVENT RISK OF ELECTRIC SHOCK, DO NOT TOUCH UN-INSULATED PARTS OF ANY CABLES WITH THE AC CORD CONNECTED. AVC System (rear view) AC INPUT 110V–240V Press down the two upper hooks to remove the cover toward you. Connecting the system cable and the AC cord to the AVC System (GREY) Connect the plug firmly until the hooks on both sides click. Connecting the system cable and the AC cord to the Display Display (rear view) Removing the terminal cover CAUTION 3 2 1 After putting the Display and the AVC System in place, connect the system cables and AC cords. Use the cable clamp for bundling the cables. Setting the System 2 Remote control unit 1 Part names Part names LC-30HV4E 6 Closing the terminal cover Bundling the cables with the clamp 5 Display (rear view) Attaching the clamp to the leg of the Display 4 Preparation Cables come out from the small opening. Setting the Display on the wall Vertical mounting Angular mounting 6 The AVC System installed vertically with the stand. Attaching point Attaching point Stand cushion Attach each cushion to the stand as shown. Peel each cushion away from the paper and attach to the four areas at the bottom. 2 Small hole Big hole Thick bulge Fit the stand to the AVC System. Insert the stand into the AVC System, making sure that the thick and thin bulges of the stand align with the big and small holes on the AVC System. Thin bulge 3 • When mounting the AVC System vertically, always use the supplied stand. Be careful not to block vent holes when standing up directly on the floor or a flat surface as this can result in equipment failure. Stand screw Attach the stand using the stand screws as shown. NOTE 4 Bulge Bulge Stand spacer Stick each spacer to the stand as shown. Peel each spacer away from the paper and attach to the four bulging areas on the stand. 1 How to install the AVC System vertically using the stand unit. • Use the supplied stand unit for installing the AVC System vertically in an upright position. Setting the AVC System with the stand • Installing the LCD Colour TV requires special skill that should only be performed by qualified service personnel. Customers should not attempt to do the work themselves. SHARP bears no responsibility for improper mounting or mounting that results in accident or injury. CAUTION Hanging on the wall AN-37AG1 wall mount bracket. (See the bracket instructions for details.) Using an optional bracket to mount the Display • You can ask a qualified service personnel about using an optional AN-37AG1 bracket to mount the Display to the wall. • Carefully read the instructions that come with the bracket before beginning work. LC-30HV4E 7 PC VCR Decoder Game console/Camcorder AVC System (front view) AVC System (rear view) Display (rear view) • Please refer to the relevant operation manual (DVD player, PC, etc.) carefully before making connections. NOTE • To protect all equipment, always turn off the AVC System before connecting to a decoder, VCR, DVD player, PC, game console, camcorder or other external equipment. • The S-video signal only outputs when “INPUT2” or “INPUT3” is selected for “Y/C”, or when from the INPUT 4 terminal (SVIDEO). Only the S-video signal can output from the INPUT 4 terminal (S-VIDEO). CAUTION AV Receiver (Built-in Tuner Amp) DVD player You can connect many types of external equipment to your System, like a decoder, VCR, DVD player, PC, game console and camcorder. To view external source images, select the input source from b on the remote control unit or INPUT on the Display. Using external equipment Speaker plug Take hold of the speaker and slowly slide it sideways. (The speaker plug is still inserted, so make sure not to pull the speaker too far.) 2 Remove the speaker plug from the terminal on the Display. (Do not remove the plug by pulling the cord.) Now the speaker can be detached from the Display. 3 NOTE • Perform the same steps for both left and right speakers. • To attach the speakers, perform the above steps in reverse order. CAUTION • The speaker terminals on the Display is only for the attached speakers. Do not connect any third party plug or speaker to the terminal. • Insert the speaker plug completely into the terminal. • Do not handle or move the Display by the speakers. Unfasten the screws used to secure the speakers in place. 1 • Before performing work make sure to turn off the System. • Before performing work spread cushioning over a flat surface to lay the Display on. This will prevent it from being damaged. Before attaching/detaching speakers You can detach the system speakers when using external amplifier/speakers. Before detaching (or attaching) speakers, unplug the AC cord from the AC outlet. This unit has detachable type speakers. Removing the speakers LC-30HV4E 9,600 bps 8 bits None 1 bit None 8 Parameter 4-digits P4 Return code Command 4-digits: Command. The text of four characters. Parameter 4-digits: Parameter 0 – 9, x, blank, ? 0 3 0 0 – 1 0 5 9 ? ? ? ? ? When “?” is input for some commands, the present setting value responds. 5 0 0 0 0 0 Input the parameter values, aligning left, and fill with blank(s) for the remainder. (Be sure that four values are input for the parameter.) When the input parameter is not within an adjustable range, “ERR” returns. (Refer to “Response code format”.) No problem to input any numerical value for “x” on the table. Parameter Command 4-digits C1 C2 C3 C4 P1 P2 P3 Command format Eight ASCII codes e CR Communication procedure Send the control commands from the PC via the RS-232C connector. The Display operates according to the received command and sends a response message to the PC. Do not send multiple commands at the same time. Wait until the PC receives the OK response before sending the next command. Baud rate: Data length: Parity bit: Stop bit: Flow control: Communication conditions Set the RS-232C communications settings on the PC to match the display’s communications conditions. The display's communications settings are as follows: • This operation system should be used by a person who is accustomed to using PC. NOTE connections. • Attach an RS-232C cable cross-type (commercially available) to the supplied Din-D/sub RS-232C for the • When a program is set, the display can be controlled from the PC using the RS-232C terminal. The input signal (PC/video) can be selected, the volume can be adjusted and various other adjustments and settings can be made, enabling automatic programmed playing. PC Control of the System RS-232C port specifications Appendix CONTROL ITEM Commands Return code (0DH) E R INPUT3 (RGB) INPUT3 (COMPONENT) 20) 90) V-POSITION (PC) ( 60 – CLOCK ( 90 – PHASE ( 20 – _ _ _ * * * * * * * * * P H S E V P O S C L C K V-POSITION (AV) ( 30 – H-POSITION (AV) ( 10 – H-POSITION (PC) ( 90 – _ _ _ * * * * * * * * H P O S H P O S * * V P O S USER VOLUME (0 – 60) _ _ _ _ _ V O L M * MOVIE GAME _ _ _ _ _ _ A V M D 3 A V M D 4 A V M D 5 STANDARD DYNAMIC _ _ _ _ _ _ A V M D 1 A V M D 2 TOGGLE _ _ _ _ _ _ _ _ _ N P 3 2 N P 3 3 I A V M D 0 I INPUT2 (Y/C) INPUT3 (CVBS) INPUT3 (Y/C) _ _ _ _ _ _ _ _ _ N P 2 1 N P 3 0 N P 3 1 I I I INPUT1 (RGB) INPUT2 (CVBS) _ _ _ _ _ _ N P 1 1 N P 2 0 I I 60) 30) 90) 10) INPUT1 – 4 (1 – 4) PC INPUT1 (CVBS) _ _ _ _ _ _ P C D x A V D * N P 1 0 I I * I TV (CHANNEL FIXED) TV (CHANNEL SELCTION) (1 – 99) _ _ _ _ _ T G D x T V D 0 INPUT SWITCHING (TOGGLE) POWER OFF (STANDBY) T V D * _ I _ I _ I P O W R 0 CONTROL CONTENTS Return code (0DH) COMMAND PARAMETER R CONTROL ITEM TEXT CHANNEL DUAL SCREEN SRS WIDE MODE W I W I D E 1 D E 2 _ _ _ _ _ _ _ _ _ _ S R S S 1 N 0 N 1 D C P G * T E X T 1 T E X T 0 C H D W x C H U P x D C C H * T W I T W I S R S S 4 S R S S 3 S R S S 2 * _ _ * _ _ _ _ _ _ _ D E 1 1 D E 1 0 D E 9 D E 8 D E 7 D E 6 D E 5 D E 4 D E 3 S R S S 0 W I W I W I W I W I W I W I W I W I D E 0 PANORAMA _ * _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ FOCUS CONTROL CONTENTS DIRECT PAGE JUMP (100 – 899) TEXT ON (TOGGLE) TEXT OFF CHANNEL DOWN CHANNEL UP DIRECT CHANNEL (1 – 99) DUAL SCREEN ON DUAL SCREEN OFF SRS FOCUS SRS OFF TOGGLE CINEMA DOT BY DOT FULL NORMAL CINEMA 14:9 CINEMA 16:9 FULL _ _ _ _ ZOOM 14:9 FULL 14:9 NORMAL TOGGLE _ _ _ _ _ _ _ _ _ _ COMMAND PARAMETER W I • If an underbar (_) appears in the parameter column, enter a space. • If an asterisk (*) appears, enter a value in the range indicated in brackets under CONTROL CONTENTS. NOTE POSITION VOLUME AV MODE SELECTION INPUT SELECTION B INPUT SELECTION A POWER SETTING K Problem response (communication error or incorrect command) O Normal response Response code format LC-30HV4E Common earth for audio Earth for blue Audio left input Blue input 4. 5. 6. 7. 9 Audio left input Not used 6. 7. Common earth for audio Earth Audio left input Blue input 4. 5. 6. 7. Audio right input Audio left output 2. 3. Audio right output 1. SCART (INPUT 3) Common earth for audio Earth 3. 4. Audio left output 2. 5. Audio right output Audio right input 1. SCART (INPUT 2) Audio right input Audio left output (TV Monitor out) 2. 3. Audio right output (TV Monitor out) SCART (INPUT 1) 1. 14. Not used 13. Earth 12. Not used 11. Green input 10. Not used 9. Earth 8. Audio-video control 14. Not used 13. Earth 12. Not used 11. Not used 10. AV LINK control 9. Earth 8. Audio-video control 14. Not used 13. Earth for red 12. Not used 11. Green input 10. Not used 21. Plug shield 20. Video input/S-video input 19. TV Monitor output 18. Earth 17. Earth for video 16. Red/Green/Blue control 15. Red input/Chroma S-Video input 21. Plug shield 20. Video input/S-video input 19. TV Monitor output 18. Earth 17. Earth for video 16. Not used 15. Chroma S-Video input 21. Plug shield 20. Video input 19. Video output (TV Monitor out) 18. Earth for Red/Green/Blue control 17. Earth for video 15. Red input 16. Red/Green/Blue control 8. Audio-video control 9. Earth for green 2 4 6 8 101214161820 1 3 5 7 9 111315171921 Various audio and video devices may be connected via the SCART terminals. Connecting pin assignments for SCART Appendix Input Select Audio Out Cool Climate Colour System Auto Installation Programme Setup Child Lock Position WSS 4:3 Mode Full Mode Rotate Language Power Save No Signal off No Operation off Treble Bass Balance Surround . Option Setup Power control Audio Contrast Brightness Colour Tint Sharpness Advanced C.M.S. Colour Temp Black Monochrome Film Mode I/P Setting DNR Picture List of AV menu items to help you with operations AV input mode menu items Basic adjustment settings PC input mode menu items Power control Audio Audio Out Cool Climate Input Signal Auto Sync. Fine Sync. Rotate Language Option Setup Power Save Power Management Treble Bass Balance Surround Contrast Brightness Red Green Blue C.M.S. Picture List of PC menu items to help you with operations LC-30HV4E LC-30HV4E DIMENSIONS AVC System Unit: mm 250 5 95 183 365 180 430 10 LC-30HV4E Display 305 79 84.5 Unit: mm 545 766 117.5 84.5 117.5 111 364 385 608 497 643 545 305 1002 11 LC-30HV4E REMOVING OF MAJOR PARTS Ë AVC System 1. Remove the five top panel retaining screws and slide the top panel backward to remove it. 2. Remove the four side panel retaining screws on both the right and left sides and slide the side panels backward to remove them. 3. Remove the three front panel retaining screws and remove the front panel. 4. Remove the five bottom panel retaining screws and slide the bottom panel backward to remove it. 5. Remove the four screws securing the main PWB angle and remove the angle upward. 6. Remove the four screws securing the main PWB to the angle and remove the main PWB. 1 1 Top panel 2 Side panel, left 1 2 Side panel, right 3 6 Main PWB Front panel 5 3 4 4 Main PWB angle 4 Bottom panel 12 LC-30HV4E 7. Remove the system/control terminal retaining: 7-1. Remove the four hex head screws securing the terminals of the system and control cables (white). 7-2. Remove the two screws securing the terminal of the system cable (gray). 7-3. Remove the rear chassis retaining screw. 8. Remove the PC I/F and SR units: 8-1. Remove the four PC I/F unit shield retaining screws and remove the shield. 8-2. Remove the six PC I/F unit retaining screws and remove the I/F unit. 8-3. Remove the two PC I/F unit angle retaining screws and remove the angle. 8-4. Remove the two SR unit retaining screws and remove the SR unit. 9. Remove the rear chassis: 9-1. Remove the two tuner nuts and washers. 9-1. Remove the 13 rear chassis retaining screws and remove the rear chassis. 10. Remove the three power supply board retaining screws and remove the power supply board. 8-1 8-2 PC I/F unit shield Rear chassis 9-2 8-3 PC I/F unit PC I/F unit angle 7-1 SR unit 7-2 8-4 7-3 10 13 Power unit 9-1 LC-30HV4E 11. Remove the AV unit: 11-1. Remove the five AV unit retaining screws and remove the AV unit. 11-2. Remove the three AV unit angle retaining screws and remove the angle. 12. Remove the fan: 12-1. Remove the two cooling fan retaining screws and remove the cooling fan. 13. Remove unit from the front chassis: 13-1. Remove the two hex head screws and two screws securing the front shield to the front chassis and remove the front shield. 13-2. Remove the four screws securing the front unit and remove the unit. 11-1 AV unit AV unit angle 11-2 Cooling Fan 12-1 13-1 Front shield 13-2 Front unit 14 LC-30HV4E Ë Display 1. 2. 3. 4. Take off bottom terminal cover. Take off the speaker by removing 4 screws and disconnecting speaker terminals. Take off the table stand by removing 6 screws. Take off the rear cabinet by removing 18 screws and releasing the front cabinet's 6 hooks. 4 4 Speaker Rear Cabinet 4 Speaker 4 4 4 2 4 2 2 4 2 4 4 3 Table Stand 1 Terminal Cover 5. Take off the operation cover assembly by removing 2 screws and detaching the connector. 6. Take off the center angle by removing 8 screws and disconnecting 1 lead wire from the fan. 6 5 Operation Cover Ass'y P131 5 P130 5 6 Center Angle P2103 6 15 LC-30HV4E 7. Take off the digital PWB by detaching 7 connectors and removing 4 screws. 8. Take off the LED PWB by detaching one connector and removing 2 screws. 9. Take off the speaker (L) PWB by detaching one connector and removing one screw. 10.Take off the speaker (R) PWB by detaching one connector and removing one screw. 7 7 7 7 7 7 SC4503 7 Digital PWB SC4502 SC4551 SC491 7 7 13 Main PWB 10 9 Speaker(R) PWB P201 Speaker(L) PWB 10 9 P202 8 LED PWB 8 11.Take off the main board by detaching 8 connectors and removing 4 screws. 12.Take off the SOUND PWB assembly by detaching 3 connectors and removing 4 screws. 13.Take off the 2 reinforcement angles by removing 3 screws from each angle. 14.Detach each connector. Inverter 1PWB 12 14 P6565 CN5 P6901 14 14 14 Inverter GND PWB CN4 P6553 CN7 14 14 P6555 P2106 P2101 SC2001 P2002 P6903 P3802 P6904 P6905 14 14 P6907 P6902 14 P6551 Audio PWB P3804 14 CN3 P2003 P6558 11 12 P3801 P2102 P2104 P6564 Main PWB Power Unit 14 P6560 14 14 P6906 P6562 14 14 12 Reinforcement angle Inverter 2 PWB Reinforcement angle 15 13 13 11 16 LC-30HV4E 15.Take off the inverter GND PWB by removing 2 screws. 16.Take off the power PWB by removing 7 screws. Remove insulation sheet. 17.Take off the inverter 1 PWB by removing 3 screws. 18.Take off the inverter 2 PWB by removing 3 screws 19.Take off the 4 reinforcement angles by removing 2 screws from each angle. 20.Take off the 2 reinforcement angles by removing 3 screws from each angle. 21.Take off the chassis frame by removing 2 screws. 22.Take off the LCD panel assembly by removing 2 screws. 15 Inverter GND PWB 16 21 17 Inverter 1 PWB 18 Inverter 2 PWB Power Unit Chassis Frame 20 20 19 19 19 19 22 22 17 LC-30HV4E 23.Take off the LCD panel with panel shield by removing 4 screws. 24.Take off D-BEF sheet, prism sheet and diffusion sheet. Take off ITO sheet and diffusion panel by removing 2 screws. 25.Take off the panel shield by removing 6 screws and 2 in the center. 23 LCD Panel 23 Lamp 25 24 25 Panel Shield 24 25 Diffusion Panel 24 ITO Sheet Diffusion Sheet Prism Sheet LCD Panel D-BEF Sheet 18 LC-30HV4E ADJUSTMENT PROCEDURES (AVC SYSTEM) Preparation for adjustment 1. The product has been adjusted and optimized in the factory. If the product needs to be readjusted for some reason, e.g., after parts replacement, follow the instructions shown below. 2. Control parameter values set in the in-process adjustment mode has been stored in the corresponding registers. When the product is readjusted, the contents of the registers are changed. Before readjustment, factory settings should be noted in case the contents of registers require to be restored. 3. Use a stabilized AC power supply. 4. To rewrite a program, you should note the items you want to change and initialize EEPROM, and then rewrite the changes into EEPROM. How to enter the in-process adjustment mode CAUTION: Exercise great care to hide the procedure in entering the in-process adjustment mode from the customer. Inadvertent setting changes in this mode may cause a fatal error resulting in a program being unrecoverable. 1. Entering the in-process adjustment mode: Connect the system cable between the display and AVC system. Turn on the main power while holding down the "Input" button and the "Volume (down)" button simultaneously. The system will be activated. ~If you see multiple lines of blue characters on the display, you are in the in-process adjustment mode. If not (the normal activation screen opens), retry. 2. Accessing the inspection process mode: After activation of the system, make adjustments according to the instructions indicated on the process adjustment OSD menu screen. Move to the General Process Adjustment (AVC System Section Process). 3. Restoring factory settings: When the "INDUSTRY INIT" button is selected after activation of the system, factory channel setting remains unchanged after the system exits from the in-process adjustment mode. Changes made by the user will default to factory settings. Note that channel setting is also initialized. 4. Exiting from the in-process adjustment mode: Unplug the power cable while the system is in the in-process adjustment mode to exit from the mode. Take care not to press the "Power" button on the remote controller or the AVC system after using factory settings to run the system. 5. OSD menu screen and menu items during manual adjustment: ~The layout and menu items of the OSD menu screen may somewhat vary depending on the program versions. ~Just rewriting a program does not cause settings to be "initial values". (Preparation for adjustment) 1. Button operation in the in-process adjustment mode Cursor Up Move to the next page Cursor Down Back to the previous page Volume (High) Increase the setting by 1 Volume (Low) Decrease the setting by 1 Enter Execute the function Cursor Left Increase the setting by 10 Cursor Right Decrease the setting by 10 Channel Select (Up) Move the cursor up Channel Select (Down) Move the cursor down Input Change Change input (Tuner -> Input 1 -> Input 2 ->Input 3 -> Input 4 -> PC ->) 19 LC-30HV4E 2. In-process adjustment screen layout Page Program version Source of input 1/13 TUNER CENTER Version 2001 06 21A OSD Version XXXXXXXX CVIC Version TTXP Version XXXXXXXX XXXXXXXX ∫ ∫ ∫ ∫ ∫ ∫ ∫ ∫ ∫ ∫ ∫ ∫ Color system NO SIG HDCP Main unit AV unit HDCP:OFF EUROPE EUROPE 6. Loading the backup data and setting HDCP when the PC I/F unit is replaced Nearly all data including factory settings, user settings, and channel setting is stored in the PC I/F unit. The product comes with EEPROM (IC1506) on the Main Unit in case the PC I/F unit is replaced; original data backed up on the EEPROM can be loaded to the new PC I/F unit. ∫ How to load the backup data Select EEPRON RECOVERT in the OSD menu (page 13/13) and turn the Volume key ON; then press ENTER. ∫ How to set HDCP After completion of adjustments, select KEY WRITE "ON" in the OSD menu (page 1/13) for manual adjustment and turn the Volume key ON; then press ENTER. 20 LC-30HV4E Ë Adjustment parameters 1) Analog adjustment (1) AVC System voltage adjustment Adjustment items Adjustment conditions Adjustment procedures 1 In-process adjustment mode (Check the destination.) 2 AVC center 3.3V adjustment Connect a DC voltmeter to TP4 at the opening on the top of the PC I/F unit. Move the cursor to the [Ë+Badj3.3V] line and adjust the TP4 voltage to 3.25±0.01V. 3 AVC center 1.8V adjustment Connect DC voltmeter to TP1701. Move the cursor to the [Ë+BAdj1.8V] line and press OK. Adjustment is complete if [Ë+BAdj1.8V complete] appears. If ERR occurs, adjust pin 6 at CN9 on the PC I/F unit so that 1.8V is reached. (2) PAL signal adjustment Adjustment items 1 Setup 2 Tuner level adjustment Using the In-process adjustment remote controller, enter the in-process adjustments mode. Check that the destination is EUROPE. Adjustment conditions Adjustment procedures 1. Set colour system to “PAL”. 2. Select PAL source. 100% colour bar signal including 100% white, such as split field colour bar Connect the oscilloscope to TP1101. 1. Adjust TP1101 so that the Y signal without the chroma component should be 1.00 ±0.05 Vp-p (between the bottom of sync signal and the white peak). 21 LC-30HV4E (3) PAL signal adjustment Adjustment items 1 2 Adjustment conditions MAIN PAL Y CONTRAST adjustment MAIN PAL COLOR GAIN adjustment Adjustment procedures 1. Adjust pin (1) of P801 to 0.70 ±0.025 Vp-p. 1. Adjust pin (3) of P801 to 0.70 ±0.025 Vp-p. 0.70V 3 MAIN CR GAIN PAL adjustment 1. Adjust pin (5) of P801 to 0.70 ±0.025 Vp-p. 0.70V 4 MAIN CONTRAST adjustment Turn off the PEAK ACL control. Adjust the output (TP815) of IC810 to have 0.90±0.025 Vp-p from the pedestal level. Press the DUAL screen button. Select the special DUAL screen settings for adjustment (so that the same video source is reflected on MAIN/ SUB). 5 SUB PAL Y adjustment 1. Adjust TB1274_SUB output (TP806) to 1.5 ±0.05 Vp-p. 6 SUB PAL COLOR GAIN adjustment 1. Adjust TB1274_SUB output (TP805) to 1.5 ±0.05 Vp-p. (4) SECAM signal adjustment Adjustment items Adjustment conditions Adjustment procedures 1 Setup 1. Set colour system to SECAM. 2. Select SECAM source. 100% colour bar signal including 100% white, such as split colour color bar 2 MAIN SECAM Y CONTRAST adjustment 1. Adjust pin (1) of P801 to 0.70 ±0.025 Vp-p. 3 MAIN SECAM COLOR GAIN adjustment 1. Adjust pin (3) of P801 to 0.70 ±0.025 Vp-p. 0.70V 4 MAIN CR GAIN SECAM adjustment 1. Adjust pin (5) of P801 to 0.70 ±0.025 Vp-p. 0.70V 22 LC-30HV4E (5) N358 signal adjustment Adjustment items Adjustment conditions Adjustment procedures 1 Setup 1. Set colour system to N358. 2. Select N358 source. 100% SMPTE colour bar or similar colour bar signal including 100% white. 2 MAIN N358 Y CONTRAST adjustment 1. Adjust pin (1) of P801 to 0.70 ±0.025 Vp-p. 3 MAIN N358 COLOR GAIN adjustment 1. Adjust pin (3) of P801 to 0.70 ±0.025 Vp-p. 0.70V 4 MAIN CR GAIN N358 adjustment 1. Adjust pin (5) of P801 to 0.70 ±0.025 Vp-p. 0.70V 5 MAIN N358 TINT adjustment 1. Adjust TB1274_MAIN output (TP802) so that waveform becomes as illustrated below: Smoothed (6) Component 15k Hz signal adjustment Adjustment items Adjustment conditions Adjustment procedures 1 Setup 1. Select component 15k Hz. 2. Select component source. 100% colour bar signal including 100% white, like split field colour bar 2 MAIN COMP 15k Y Level adjustment Adjust pin (1) of P801 to 0.7 0±0.025 Vp-p. 3 MAIN COMP 15k COLOR GAIN adjustment Adjust pin (3) of P801 to 0.70 ±0.025 Vp-p. 0.70V 4 MAIN CR GAIN COMP 15k adjustment Adjust pin (5) of P801 to 0.70 ±0.025 Vp-p. 0.70V 23 LC-30HV4E (7) Component HDTV signal adjustment Adjustment items Adjustment conditions Adjustment procedures 1 Setup 1. Input HDTV (1080i) component signal. 2. Select component source. 100% colour bar signal including 100% white, like split field colour bar 2 MAIN COMP HDTV CONTRAST adjustment Turn off the PEAK ACL control. Adjust the TP815 to have 0.90 ±0.25 Vp-p from the pedestal level. 2. Factory settings (1) Factory Setting Adjustment item 1 Description Adjustment procedure INDUSTRY INT * Then turn off the AC power supply of the AVC system. (Be careful not to use the power switches of the remote control unit and AVC system.) 24 LC-30HV4E In-process adjustment items Do not change items, the adjustment procedure of which is not described in this manual. Inadvertent changes of such items may result in unexpected or unrecoverable errors. Page Item Page Item Maker Select Ë+BAdj3.3V Ë+BAdj1.8V(Enter: Auto) KEY WRITE ËDATA COPY INDUSTRY INIT CENTER Version OSD Version CVIC Version TTXP Version MONITOR Version STANDBY TYPE HOTEL MODE ËSUB PAL Adjust ËSUB PAL Y ËSUB PAL COLOR GAIN ËTUNER DAC ADJ Page 2 ËPAL Y CONTRAST ËPAL COLOR GAIN ËMAIN CR GAIN PAL ËMAIN CONTRAST 15K Center Acutime RESET Monitor Acutime RESET Page 4 ËSECAM Adjust ËSECAM Y CONTRAST ËSECAM COLOR GAIN ËMAIN CR GAIN SECAM Page 5 ËN358 Adjust ËN358 Y CONTRAST ËN358 COLOR GAIN ËMAIN CR GAIN N358 ËN358 TINT ËREFERENCE Adjust Page 6 ËCOMP15K Adjust ËCOMP15K Y CONTRAST ËCOMP15K COLOR GAIN ËMAIN CR GAIN COMP15K ËCOMP HDTV Adjust ËCOMP HDTV CONTRAST ËCOMP HDTV SUB BRIGHT ËPEAK ACL SW Page 7 ËPAL White Balance PAL R CUTOFF PAL R DRIVE PAL G CUTOFF PAL G DRIVE PAL B CUTOFF PAL B DRIVE Page 8 ËN358 White Balance N358 R CUTOFF N358 R DRIVE N358 G CUTOFF N358 G DRIVE N358 B CUTOFF N358 B DRIVE Page 9 ËCOMP15K White Balance COMP15K R CUTOFF COMP15K R DRIVE COMP15K G CUTOFF COMP15K G DRIVE COMP15K B CUTOFF COMP15K B DRIVE Page 10 ËCOMP33K White Balance COMPHDTV R CUTOFF COMPHDTV R DRIVE COMPHDTV G CUTOFF COMPHDTV G DRIVE COMPHDTV B CUTOFF COMPHDTV B DRIVE Page 11 IPMODE INTERLACE MDSW INTERLACE PTGSW INTERLACE IPMODE PROGRESSIVE MDSW PROGRESSIVE PTGSW PROGRESSIVE IPMODE FMODEON MDSW FMODEON PTGSW FMODEON IPMODE SUB MDSW SUB PTGSW SUB IPMODE FMODEON PAL MDSW FMODEON PAL PTGSW FMODEON PAL DEBUG PRINT SW PIC ADJ MAKER SELECT PIC ADJ KOUTEI SELECT EEPROM SAVE EEPROM RECOVER DEBUG_SELECT_SW DEBUG COMPANY SELECT DEBUG PANELTYPE SELECT CENTER PROG UPDATE Page 12 IPMODE PROGRESSIVE2 MDSW PROGRESSIVE2 PTGSW PROGRESSIVE2 IPMODE FMODEON2 MDSW FMODEON2 PTGSW FMODEON2 ILG LV MD LV VE LV IP MODE SEL Page 1 Page 3 Page 13 25 LC-30HV4E UPGRADING INSTALLED PROGRAMS Programs installed in the product are mainly divided into the following two categories: ∫ Main programs (for AVC system) ∫ Monitoring program (for display) CAUTON: Exercise great care to hide the procedure in entering the in-process adjustment mode from the customer. Inadvertent setting changes in this mode may cause a fatal error resulting in a program being unrecoverable. [Tools required] ∫ PC A Windows 95/98/me/2000/XP PC that has a COM port (RS-232C). A USB-R232C converter will be acceptable provided that it is appropriately set and has PC compatibility. ∫ RS-232C cross cable Interlink cable is also acceptable. [Preparations] Rewriting a program needs the product to enter the in-process adjustment mode. 1) The rewriting software is supplied in the form of an exe file named e.g., "MAIN_2002_10_10A.exe" (provisional). Create a directory on a HD and copy the software into the directory. 2) Double-click the file. The file will be self-extracted. Check the extracted file against the documentation accompanying with the software. 3) Connect the AVC System and the display unit with each other and make them ready for operation (make sure the power LEDs of the AVC System and display unit turn red). 4) Use an RS-232C cable to connect the PC to the AVC System. 5) Exercise great care to hide the procedure in entering the in-process adjustment mode from the customer. Press the MAIN POWER button while holding down the volume DOWN key and the INPUT key on the display unit simultaneously. If blue characters appear on the display, the system has entered the in-process adjustment mode successfully. If not (the normal activation screen opens), retry. [Rewriting the main program] 1) In the in-process adjustment mode, press the Channel Up key on the remote controller. You will move to page 13 ("13/13" will appear on the upper left corner of the screen). 2) Make sure CENTER PROG UPDATE is highlighted. 3) Use the VOLUME -/+ keys to change OFF to ON. 4) Press the ENTER key on the remote controller. Characters on the screen will disappear and the screen blacks out. 5) Double-click the batch file specified in the document accompanying with the software. 6) A black window (MS-DOS window) will open and rewriting starts automatically. Rewiring of the main program is now complete. Unplug the AC cable from the AVC System and turn off the system and then on again. 7) Enter the in-process adjustment mode and make sure the version information on the CENTER Version, OSD Version and CVIC Version lines on page 1 has been updated. 26 LC-30HV4E Continued 27 LC-30HV4E [Rewriting the monitor program] 1) Start terminal software in the in-process adjustment mode. (Terminal software is not supplied. Use a freeware program available on the Internet.) 2) Set as follows: Baud rate: 9600 Data length: 8 bits Parity: None Stop bit: 1 Flow control: None 3) If the settings are correct, pressing ENTER will cause ERR to appear on the screen. 4) Type "IPL_0002" and press ENTER. Characters on the screen will disappear and the screen blacks out. * After the above string is entered, unusual indication may appear on the screen. This is not abnormal. 5) Press ENTER. The following will appear on the screen: ERR SEND "MONITOR PROG UPDATE PROGRAM" from PC to MR 6) Change the baud rate of the terminal software to 115200. 7) Use the file transfer facility of the terminal software to transfer the file specified in the document accompanying with the rewriting software. 8) If the terminal software screen shows the following indication, the monitor program has been rewritten successfully. (The indication will vary depending on the terminal software and program versions.) 9) Enter the in-process adjustment mode and make sure the version information on the MONITOR line has been updated. 28 LC-30HV4E ADJUSTMENT PROCEDURES (DISPLAY) See "Adjusting mode" for the steps to go into adjustment process mode. 1) +B adjustment (Digital PWB: R4648) 1. Receive PAL standard color bar signal. 2. Connect digital voltmeter to TP4602 and adjust to the specified value. Specification: 13.00 ± 0.05V 2) Common bias adjustment Make this adjustment each for "50 Hz", "60 Hz" and "PC". Select the input signal according to the indication onscreen. 1. Go to "Adjustment process mode". 2. On the LCD, select "14" of "PATTERN 1", dot inversion flicker pattern 2. 3. Then, select "COM BIAS" on the LCD. 4. Set the value so that the flicker on the screen is minimized. Note: Apply this adjustment after for at least 30 min. 3) Background adjustment 1. Select video standard, and confirm the indication that the unit is preset to the standard. 2. At video input, receive the window pattern signal having left 80% WHITE and right 20% WHITE. 3. Set the screen size to the full mode. 4. Go to "Adjustment process mode". 5. Adjust "R OFFSET", "G OFFSET" and "B OFFSET" in "SIL861" so that left side 80% WHITE window pattern is set to the specified value. 6. Adjust "R GAMMA", "G GAMMA" and "B GAMMA" in "SIL861" so that right side 20% WHITE window pattern is set to the specified value. Specification: x = 0.275 y = 0.273 (80% WHITE) x= 0.269 y = 0.253 (20% WHITE) [Minolta CA-110] Note: Apply this adjustment after for at least 30 min. 4) Initialization 1. Go to "Adjustment process mode". 2. Select "1" thru "3" of "CLR MODE" in "TEST". Setting range: 0 Normal 1 Initial setting (User clear: Factory setting) 2 Initial setting (All clear) Full initialization of EEPROM (except for ROM area) 3 Full initialization of Configuration EEPROM 3. Move the cursor down by one line. 4. Press "VOL UP" key and change the display from "WAIT" to "SEND" (write). 5. Do not shut down power while the display is "SEND". 6. When the writing is finished, the display changes from "SEND" to "WAIT". 5) Resetting lamp error counter 1. Go to "Adjustment process mode". 2. Select "L ERR RESET" in "TEST". 3. Reset the data to "0". [L ERR RESET] Function: Reset of fluorescent lamp error counter It resets the times of fluorescent lamp errors and clears the last value in the memory. Indication range: 0-5 (Fluorescent lamp errors) (When lamp error exceeds 5 times, power supply is disabled. Resetting is required in this case.) 29 LC-30HV4E 3. Adjusting Mode 1. Overview The controller IC can be adjusted in this mode. Adjustment is done while controlling the setting of the resistor corresponding to the selected adjustment item. When monitor is used independently, it is adjusted using the OSD simple display function incorporated in LCD controller. The OSD function of panel link receiver (SIL861) is used for adjustment of the independent monitor. 2. Entry to the mode 1) When cable is not connected (independent mode), follow the steps below. a) When power switch is turned on, press the main unit INPUT and VOL DOWN keys simultaneously. b) Press the remote controller's process adjustment key (R/C code: 40h) / process adjustment mode 2 key (R/ C code: 31h). 2) When not in independent mode, follow the steps below. a) When power switch is turned on, press the main unit CH DOWN and VOL UP keys simultaneously. b) Press the remote controller's process adjustment mode 2 key. 3. Exit from the mode Turn off the power. Press the remote controller's process adjustment mode 2 key. 4. Display 1) First layer display The third line shows the title. The 5th line and below show the items. Microprocessor's version number appears in the 16th line. Example) 1.00 → 1 00 1 2 3 4 5 6 1 S E R V I C 2 O M O D E 3 L C D 4 S I L 8 6 5 T E S T 6 V 7 8 9 10 11 12 13 14 E M O D E 5 0 H Z 1 E R X X X 2) Second layer display (Adjustment item display) A single page shows up to 10 adjustment items (or 14 lines). The third line shows the title and the screen mode selected in MODE items (only when LCD is selected). The 5th line shows the item. Microprocessor's version number appears in the 16th line. Example) 1.00 → 1 00 Setting is shown in decimal number. a) Adjustment on the LCD items 1 2 3 4 5 6 7 8 9 10 11 12 13 1 L C D 5 0 H Z 2 O V L 0 2 2 3 R E F 0 2 0 4 V L 6 4 9 5 R E F 6 4 1 7 6 V L 9 6 9 7 R E F 9 6 1 8 8 V L 1 2 8 8 9 R E F 1 2 8 1 8 10 V L 1 6 0 7 11 R E F 1 6 0 1 9 14 1 9 8 0 2 4 5 8 1 9 30 LC-30HV4E b) Adjustment on the TEST items 1 2 3 4 5 1 T E S T 2 O L E R 3 L C D 4 5 C L R 6 7 C N F G 8 6 7 8 9 10 11 12 13 14 R R E D A T A M O D E E E P 0 0 0 0 0 W A I T 0 W A I T 0 0 0 0 W A I T 5. Changing data In "adjustment item display", the items pointed by cursor can be changed using VOL UP/DOWN key.(Holding down the key is effective.) For the items in "LCD DATA", select the item and hit ENTER key. The ten's digit (leftmost digit) in the address changes to red (others in green). Data change using VOL UP/DOWN key is enabled. To move to the next digit, press CH UP key (or rightward cursor key). To go back to the previous digit, press CH DOWN key (or leftward cursor key). Thus, 4 digits data can be entered. When CH UP key is pressed while in rightmost digit, the cursor moves to the leftmost digit. When CH DOWN key is pressed while in leftmost digit, the cursor moves to the rightmost digit. After address data adjustment, press ENTER key to exit from 4-digit adjustment and change the entire "LCD DATA" line to red letters. (Same status as item selection) 6. Key operation 1) Basic behaviors Basic key behaviors are as follows. Behavior Keys Remote controller Upward cursor movement Cursor up Downward cursor movement Cursor down Rightward cursor movement Cursor right Leftward cursor movement Cursor left Data UP VOL UP Data DOWN VOL DOWN Set ENTER Back to previous layer RETURN Back (In bottom layer only) ENTER Main unit CH UP CH DOWN VOL UP VOL DOWN INPUT INPUT 2) Data UP/DOWN For the item for which OSD display is available, switch the display. Adjust the data with UP/DOWN operation. (Any value beyond the limit is replaced by the limit value.) Output data processing Data transmission for every UP/DOWN operation (Data related to peripheral controller IC) Execution of the last memory data when key is off While the key is held down, the second step is performed approx. 500ms after the key operation and, after this, every single step of UP/DOWN is carried out sequentially at 135ms interval. 3) Cursor UP/DOWN Select the adjustment item by pointing it with the cursor. When upward cursor movement is done while the cursor is at the top item, the cursor goes to the bottom item. (In the case of multiple pages, the cursor goes to the bottom item on the previous page.) When downward cursor movement is done while the cursor is at the bottom item, the cursor goes to the top item. (In the case of multiple pages, the cursor goes to the top item on the next page.) While the key is held down, the second step is performed approx. 500ms after the key operation and, after this, every single step of UP/DOWN is carried out sequentially at 135ms interval. 31 LC-30HV4E ADJUSTMENT MODE MENU LIST First layer item MODE LCD PAGE 1 1 2 3 4 SIL861 1 TEST 1 ITEM VL0 REF0 VL64 REF64 VL96 REF96 VL128 REF128 VL160 REF160 VL192 REF192 VL224 REF224 VL256 REF256 COM BIAS PWM CTRL PWM FREQ PWM DUTY PATTERN1 PATTERN2 P – CLK1 P – CLK2 OS SW OS D1 OS D2 OS D3 OPC LV0 OPC LV1 OPC LV2 OPC LV3 OPC LV4 OPC LV5 OPC LV6 OPC LV7 OPC LV8 OPC LV9 OPC LV10 R GAMMA R OFFSET G GAMMA G OFFSET B GAMMA B OFFSET L ERR RESET LCD DATA CLR MODE CNFG EEP SETTING RANGE 50HZ/60HZ/PC 0 ~ 255 0 ~ 255 0 ~ 255 0 ~ 255 0 ~ 255 0 ~ 255 0 ~ 255 0 ~ 255 0 ~ 255 0 ~ 255 0 ~ 255 0 ~ 255 0 ~ 255 0 ~ 255 0 ~ 255 0 ~ 255 0 ~ 255 0~7 0 ~ 4095 0 ~ 4095 0 ~ 14 0 ~ 12 0~3 0~7 0 ~1 0 ~ 255 0 ~ 255 0 ~ 255 0 ~ 85 0 ~ 85 0 ~ 85 0 ~ 85 0 ~ 85 0 ~ 85 0 ~ 85 0 ~ 85 0 ~ 85 0 ~ 85 0 ~ 85 20 ~ 180 0 ~ 510 20 ~ 180 0 ~ 510 20 ~ 180 0 ~ 510 0~50 Four digits 0 ~ F WAIT/SEND One digits 0 ~ 2 WAIT/SEND Four digits 0 ~ F WAIT/SEND * Values in the parentheses are with PC. 32 INITIAL VALUE 50HZ 221 209 98 170 92 184 85 188 71 199 77 103 88 112 108 78 70 585 0 0 0 0 0 0 138 167 170 0(40) 8(44) 16(48) 24(52 32(56) 40(60) 48(64) 56(68) 64(72) 72(76) 80(80) 100 256 100 256 100 256 Toggle 0 WAIT 0 WAIT 0 WAIT DATA SETTING Toggle No Toggle No Toggle No Toggle No Toggle No Toggle No Toggle No Toggle No Toggle No Toggle No Toggle No Toggle No Toggle No Toggle No Toggle No Toggle No Toggle No Toggle Toggle No Toggle No Toggle Toggle Toggle No Toggle No Toggle Toggle No Toggle No Toggle No Toggle No Toggle No Toggle No Toggle )No Toggle No Toggle No Toggle No Toggle No Toggle No Toggle No Toggle No Toggle No Toggle No Toggle No Toggle No Toggle No Toggle No Toggle Toggle ——— Toggle ——— Toggle ——— LC-30HV4E MAJOR IC FUNCTIONS INFORMATIONS ∫ IC2501 (MSP4418G) IC for decoding audio signals. It serves as an S-IF audio signal decoder and an audio data selector. ∫ IC2510 (IXA385WJ) IC for controlling audio delay. LC-30/37HV4E uses a frame buffer to process video signals. This results in delay in outputting video signals. The IC delays output of audio signals to synchronize output of video and audio signals. ∫ IC1301 (CXA2069Q) 7-input, 3-output selector. This IC selects all audio and video signals received from input terminals and the tuner, except those signals that relates to PC and components. Video signals delivered to the IC are sent to YC separation circuits IC401 (main) and IC402 (sub). Audio signals are sent to the SR unit via IC2501 (sound processor). ∫ IC401 (MM1519XQ) 4-input, 3-output video selector for component input. This IC receives AV3 component input, AV1/3 RGB input and teletext RGB signals. Its output is for main, sub and component. ∫ IC1601 (SDA5550M) Teletext processing microcomputer. This IC receives vide signals, decodes teletext and outputs data in RGB format. ∫ IC401/IC402 (TC90A69) Adaptive infield 3-line digital comb filter supporting both NTSC and PAL. This IC is a high-precision Y/C 1 chip incorporating a CNR circuit and performs YC separation of the sub video signals received from IC1301. ∫ IC403/IC404 (ML6428C1) 6.7 MHz low-pass filter. ∫ IC801/IC802 (TB1274AF) IC for synchronous processing of video and chroma signals for PAL/NTSC/SECAM color TV. Color demodulation is provided by a high-performance image compensation circuit in the video section, a PAL/ NTSC/SECAM auto discrimination circuit in the chroma section, and a crystal that generates 4.43 MHz, 3.58 MHz and M/N-PAL clock signals. This IC has a 4-channel YC signal input, 2-channel RGB signal input, and 2-channel chrominance signal input. It receives main and sub chrominance signals from IC401 (main) and IC402 (sub) and delivers chrominance signals via one-channel output. ∫ IC803 (CXA2101Q) IC having a chrominance input integrated with a high-performance image compensation circuit. Equipped with circuits for processing baseband signals and RGB signals and a 4-channel video switch incorporating an H/V synchronization signal processing circuit. Input selection is done by INPUT-SEL (IIC BUS). Y, Pb, Pr and GBR of Ycb, Cr and HD and their H/V synchronization signals are inputted to input pins of each channel. Multi-scan facility permits acceptance of a horizontal scan line frequency range of 16 KHz to 60 KHz. 33 LC-30HV4E ∫ IC1901 (IXA392WJ) FPGA for synchronous processing This IC selects synchronization signals and creates horizontal blanking signals. ∫ IC604 (TA1318AF) IC for synchronous processing of TV component signals and measurement of frequency. This IC incorporates an input signal frequency measurement feature and synchronous regeneration features. It supports synchronous horizontal regeneration (15.75 KHz, 31.5 KHZ, 33.75 KHz and 45 KHz) and synchronous vertical regeneration (525I, 525P, 625I and 750P). PC I/F board side ∫ IC4 (CX3506R) 3-channel, 8-bit, 120 MSPS A/D converter incorporating AMP and PLL. This IC is for video signals inputted to the IF board and used for one-screen and two-screen applications, and for PC signals inputted to the front panel. It provides A/D conversion of video signals (analog RGB) inputted to IN1 from CN6 and PC signals (analog RGB) inputted to IN2 from CN8. Converted digital signals are sent to IC25. ∫ IC310 (TLC5733A) 3-channel, 8-bit, 20 MSPS A/D converter. This IC is for video signals inputted to the IF board and used for two-screen application. It provides A/D conversion of video signals (analog YcbCr) inputted to IC310 from CN6. Converted digital signals are sent to IC25. ∫ IC25 (IXA091WJ) IC for I/P conversion and scaling of digital image according to the output resolution, and for data conversion. There are two input channel: V0 and V1. V1 is for sub 480i/580i input processing for two-screen application. V0 is for processing all signals for main used for one and two-screen applications. The IC generates clamp signals based on input synchronization signals. It also performs data matrix conversion, and creates OSD signals. Processed signals are sent to IC413. ∫ IC413 (SiI170) Panel link transmitter. This IC converts 8-bit RGB image data received from IC25 into TMDS differential signals and sends to the monitor. ∫ IC1 (IX8270CE) One-chip RISC microprocessor. This IC communicates with the monitor and controls the system operation. It controls all the ICs located in the media receiver. ∫ IC405 (UPD4721G) RS-232 line driver/receiver conforming to EIA/TIA-232-E. This IC enables the system to be controlled from a PC connected to the system. It also allows IC1 to be upgraded using the PC. 34 LC-30HV4E ËRH-iXA385WJZZ (ASSY:IC2510) » Pin mapping Pin No. 1, 19, 32, 33 44, 64 2 3 4 5 6 7 8, 9, 10, 18, 31 41, 42, 43, 62 11 12 13 14 15 16 17 20 21 22 23 24 25 26 27 28 29 30 34 35 36 37 38 39 40 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 63 Pin Name Type Description VDD –– Power supply PLLVDC VCOIN TEST CPOUT PLLEN PLLGND GND –– I I O I –– –– PLL power supply VCO IN (used to construct external loop filter) Input for testing Charge pump out (used to construct external loop filter) PLL enable signal input PLLENO SPDIFO SPDIFI IO0 IO1 IO2 IO3 IO4 UTEST NANDTO RESET MEMTEST BISTOUT RWCLK RSTRW FEW FRE FD07 FD06 FD05 FD04 FD03 FD02 FD01 FD00 FD17 FD16 FD15 FD14 FD13 FD12 FD11 FD10 SDA SCS SCK I2SCLO I2SDAO I2SWSO I2SWSI I2SDAI I2SCLI REFCLK O O I I/O I/O I/O I/O I/O I O I I O O O O O O O O O O O O O I I I I I I I I I/O I I O O O I I I I PLL enable signal output S/PDIF output (3.072 Mbps) S/PDIF input (3.072 Mbps) Expanded I/O, bit 0 Expanded I/O, bit 1 Expanded I/O, bit 2 Expanded I/O, bit 3 Expanded I/O, bit 4 Input for testing Output for testing Asynchronous reset signal input Input for testing Output for testing Expanded FIFO R/W clock Expanded FIFO master reset Expanded FIFO write enable Expanded FIFO read enable Expanded FIFO data output, bit 7 Expanded FIFO data output, bit 6 Expanded FIFO data output, bit 5 Expanded FIFO data output, bit 4 Expanded FIFO data output, bit 3 Expanded FIFO data output, bit 2 Expanded FIFO data output, bit 1 Expanded FIFO data output, bit 0 Expanded FIFO data input, bit 7 Expanded FIFO data input, bit 6 Expanded FIFO data input, bit 5 Expanded FIFO data input, bit 4 Expanded FIFO data input, bit 3 Expanded FIFO data input, bit 2 Expanded FIFO data input, bit 1 Expanded FIFO data input, bit 0 Serial communication data Serial communication chip select Serial communication chip select 12S CL output 12S CL output 12S WS output 12S WS input 12S DA input 12S CL input PLL REF CLK (same input as 12SCLI) 35 LC-30HV4E 36 LC-30HV4E » Pin mapping Pin No. 1 2 3 4 5 6 7 8 9 10 11, 12, 13 14, 15, 16 17 18 19 20 21 22 23 24 25 26 27 28 29, 30, 31, 32 33 34 35 36 37 38 39 40 41,42 43,44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61, 62 63, 64 65, 66 67 68 69 70 71 72 73 74 75, 76 77 78 79 80 Pin Name NC I2C_CL I2C_DA I2S_CL I2S_WS I2S_DA_OUT I2S_DA_IN1 ADR_DA ADR_WS ADR_CL DVSUP DVSS I2S_DA_IN2 NC I2S_CL3 I2S_WS3 RESETQ I2S_DA_IN3 NC DACA_R DACA_L VREF2 DACM_R DACM_L NC SC2_OUT_R SC2_OUT_L VREF1 SC1_OUT_R SC1_OUT_L CAPL_A AHVSUP CAPL_M NC AHVSS AGNDC NC SC4_IN_L SC4_IN_R ASG SC3_IN_L SC3_IN_R ASG SC2_IN_L SC2_IN_R ASG SC1_IN_L SC1_IN_R VREFTOP NC MONO_IN AVSS NC AVSUP ANA_IN1+ ANA_INANA_IN2+ TESTEN XTAL_IN XTAL_OUT TP AUD_CL_OUT NC D_CTR_I/O_1 D_CTR_I/O_0 ADR_SEL STANDBYQ Type –– I/O I/O I/O I/O O I O O O –– –– I –– I I I I –– O O –– O O –– O O –– O O –– –– –– –– –– –– –– I I –– I I –– I I –– I I –– –– I –– –– –– I I I I I O –– O –– I/O I/O I I Description Not connected I2C clock I2C data I2S clock I2S word strobe I2S data output I2S1 data input ADR data output ADR word strobe ADR clock Digital power supply 5V Digital ground I2S2-data input Not connected I2S3 clock I2S3 word strobs Power-on-reset I2S3-data input Not connected Headphone out, right Headphone out, left Reference ground 2 Loudspeaker out, right Loudspeaker out, left Not connected SCART 2 output, right SCART 2 output, left Reference ground 1 SCART 1 output, right SCART 1 output, left Volume capacitor AUX Analog power supply 8V Volume capacitor MAIN Not connected Analog ground Analog reference voltage Not connected SCART 4 input, left SCART 4 input, right Analog Shield Ground SCART 3 input, left SCART 3 input, right Analog Shield Ground SCART 2 input, left SCART 2 input, right Analog Shield Ground SCART 1 input, left SCART 1 input, right Reference voltage IF A/D converter Not connected Mono input Analog ground Not connected Analog power supply 5V IF input 1 IF common(can be left vacant, only if IF input 1 is also not in use) IF input 2(can be left vacant, only if IF input 1 is also not in use) Test pin Crystal oscillator Test pin Audio clock output(18.432MHz) Not connected D_CTR_I/O_1 D_CTR_I/O_0 I2C Bus address select Stand-by(low-active) 37 LC-30HV4E ËVHiCXA2069Q-1 (ASSY:FIC1301) S2-compatible 7-input, 3-output AV switch »Block diagram 38 LC-30HV4E » Pin mapping Pin No. Pin Name Type 63 1 8 15 22 30 60 3 10 17 24 49 5 12 19 26 51 62, 2 9, 16 23, 29 59, 64 4, 11 18, 25 31, 61 53 41 44 56 39 58 47 37 52 43 38 54 45 40 6 13 20 27 7 14 21 28 32 TV V1 V2 V3 V4 V4 V4 Y1 Y2 Y3 Y4 YIN1 C1 C2 C3 C4 CIN1 LTV, LV1 LV2, LV3 LV4, LV5 LV6, RTV RV1, RV2 RV3, RV4 RV5, RV6 VOUT1 VOUT3 V/YOUT2 YOUT1 YOUT3 COUT1 COUT2 COUT3 LOUT1 LOUT2 LOUT3 ROUT1 ROUT2 ROUT3 S2-1 S2-2 S2-3 S2-4 S-1 S-2 S-3 S-4 ADR I I I I I I I I I I I I I I I I I I I I I I I I O O O O O O O O O O O O O O I I I I I I I I I 33 34 36 SCL SDA DC OUT I I O 55 46 48 TRAP1 TRAP2 MUTE I I I 50 BIAS I Description Video signal input Composite video signal input Y/C separation signal input, used for luminance signal input YIN1: Input for signal created by Y/C separation of VOUT1 output Y/C separation signal input, used for chrominance signal input CIN1: Input for signal created by Y/C separation of VOUT1 output Audio signal input Video signal output, used for composite vide signal output Video signal output, controlled via 12C bus and used for composite video signal output Power or luminance signal output is selected. Video signal output, used for luminance signal output Video signal output, used for chrominance signal output Audis signal output Used for detection of S2-compatible DC that is superimposed to C signal. 4:3 image signal is selected when voltage ? 1.3V, 4:3 letterbox signal when 1.3V < voltage ? 2.5V, and 16:9 squeeze signal when voltage > 2.5V. 4:3 image signal is selected when the pins are open because they are pulled down to GND via 100K?. Used for selection between composite video signal and S signal. Detection result is written to the status register. S signal is selected when voltage ? 3.5V, and composite video signal when voltage > 3.5V. Composite video signal is selected when the pins are open because they are pulled down to 5V via 100K?. Used for selection of slave address for 12C bus. 90H is selected when voltage ? 1.5V, and 92H when ? 2.5V. 90H is selected when the pin are open. 12C bus signal input 12C bus signal input Used for output of S2-compatible DC that is superimposed to COUT3. DC superimposition is done by connecting to COUT3 via capacitor. The pin is controlled via 12C bus. Connection of 4.7k? external resistor provides output impedance of 10?3K? that conforms to S2. Connected to trap circuit for sub carrier. Mute for audio signal output. Mute is on when voltage ? 1.3V and off when voltage ? 2.5V. Mute is off when the pin is open. Internal reference bias input. Connected to GND via capacitor. 39 LC-30HV4E ËVHiMM1519XQ-1 (IC1401) Component Input Video Switch »Block diagram 40 LC-30HV4E » Pin mapping Pin No. 1 2 3 11 12 13 21 22 23 4, 14, 39,45, 52, 58 51 5 15 53 59 24 6, 8, 16, 18, 33,35, 37, 41, 43, 47, 49, 54, 58, 60, 62 7 9 17 19 55 57 61 63 10 20 32 64 25 26 27 28 29 30 31 34 36 38 40 42 44 46 48 50 Pin Name Type VIDEO 1-L1 VIDEO 1-L2 VIDEO 1-L3 VIDEO 2-L1 VIDEO 2-L2 VIDEO 2-L3 VIDEO 3-L1 VIDEO 3-L2 VIDEO 3-L3 VCC AVCC VIDEO 2-Y VIDEO 3-Y TUNER-Y VIDEO 1-Y DGND GND I I I I I I I I I –– –– I I I I –– –– VIDEO 2-Pb VIDEO 2-Pr VIDEO 3-Pb VIDEO 3-Pr TUNER-Pb TUNER-Pr VIDEO 1-Pb VIDEO 1-Pr VIDEO 2-SW VIDEO 3-SW MONO-SW VIDEO 1-SW ADDRESS SDA SCL DVCC L3 OUT L2 OUT L1 OUT Pr OUT 3 Pb OUT 3 Y OUT 3 Pr OUT 2 Pb OUT 2 Y OUT 2 Pr OUT 1 Pb OUT 1 Y OUT 1 I I I I I I I I I I I I I I/O I –– O O O O O O O O O O O O Description D-pin connection line input Analog power supply (9V) Y signal input Chrominance input D-pin connection check switch line input Slave address input 12C bus data input/output 12C bus clock input Digital power supply (5V) Monitor output line output Image output 41 LC-30HV4E ËVHiTB1274AF-1Q (ASSY:IC801, IC802) VIDEO/CHROMA Processor »Block diagram 42 LC-30HV4E » Pin mapping Pin No. Pin Name Type 1 2 3 4 5 6 7 8 9 10 CVBS1/Y1-IN SYNC-IN CVBS-OUT VS COMB Y-IN D-VDD COMB C-IN D-GND HS SCP I I O O I –– I –– O O 11 12 13 14 15 Yvi-IN SYNC-VCC SCL SDA YS3 (iRGB1-in) SYNC-GND Cr1-IN Cb1-IN Y1-IN CLP-FIL Y-OUT Cb-OUT Cr-OUT YS1 (YVbC2-IN) B1-IN G1-IN R1-IN Y/C-GND Cr2-IN Cb2-IN Y2-IN Y/C-VCC B2-IN G2-IN R2-IN YS2/YM (RGB2-IN) FIL. X'TAL C3-IN APC-FIL CVBS3/Y3-IN ADDRESS C2-IN CVBS2/Y2-IN COMB SYS Fsc-OUT AFC-FIL C1-IN O –– I I/O I 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 –– I I I –– O O O I I I I –– I I I –– I I I I –– –– I –– I I I I O O –– I Description CVBS1 or Y1-IN signal input Synchronization signal input CVBS or Y+C signal output Output of counted-down vertical synchronization signal Input of Y signal outputted from comb filter. Open when not used 5 VDC power supply to DDS/BUS/V-CD/H-CD block (standard) Input of C signal outputted from comb filter. Open when not used GND for DDS/BUS/V-CD/H-CD block Output of horizontal synchronization signal under AFC Sand castle pulse output. Clamp pulse and horizontal blanking pulse are outputted. Output of synchronous input Y signal selected using video SW 5VDC power supply to SYNC/HVCO block (standard) 12C bus SCL input 12C bus SDA output Switch for selection between main signal and RGB1 input signal. This input is operative only when RGB1-ENB is enabled during bus setting. GND for SYCN/HVOC block Y1/Cb/Cr1 signal input Used to connect Y clamp filter Y/Cb/Cr signal output Switch for selection between main signal and input signal RGB1 signal input. YS3 or 12C bus is used to select signal. GND for Y/C/Text/Video-SW/1HDL block Y2/Cb2/Cr2 signal input. YS1 is used to select signal. Open when the pin is not used. 5VDC Power supply to Y/C/Text/Video-SW/1HDI block. (standard) RGB2 signal input. YS is used to select signal. Open when not used. Switch for selection between main signal and RGB2 input signal Connected to Y/C-VCC pin Connect to 16.2 MHz crystal oscillator Chroma signal input. Open when not used. Connected to chroma modulation filter CVBS33 or Y3 signal input. Open when not used. Slave address input Chroma signal input. Open when not used. CVBS2 or Y2 signal input. Open when not used. Current color system discrimination result output. Pin 46 is also used for this output. Sub carrier output Connected to AFC detection filter Chroma signal input. Open when not used. 43 LC-30HV4E ËVHiCXA2101Q-1 (ASSY:IC803) Baseband image signal processing »Block diagram 44 LC-30HV4E » Pin mapping Pin No. Pin Name Type 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 37 39 36 38 40 41 42 43 44 45 IN2-H IN2-V IN2-1 IN2-2 IN2-3 Vcc-MAT IN3-H IN3-V IN3-1 IN3-2 IN3-3 GND-MAT IN4-H IN4-V IN4-1 IN4-2 IN4-3 V-PH IN5-H IN5-V IN5-1 IN5-2 IN5-3 H-PH YG-OUT YG-IN IREF-SYNC VS-OUT HS-OUT Vcc-OUT SCP-IN VTIM-IN HP-IN GND-OUT R-OUT G-OUT B-OUT R-SH G-SH B-SH IK-IN PABL-FIL ABL-FIL ABL-IN ABL-IN I I I I I –– I I I I I –– I I I I I 46 47 48 49 LR1-IN LG1-IN LB1-IN LB1-IN I I I I 50 51 52 53 54 LR2-IN LG2-IN LB2-IN ADDRESS DPIC-C I I I I I 55 56 57 58 59 60 61 SCL SCL DPIC-MUTE CLP-C VM-OUT VM/SHP/COL-OFF YCBCR-SW I I I 62 63 64 ECR-IN ECB-IN EY-IN I I I I I O I O O O I I I O O O O Description IN2-H: Independent H periodic signal input IN2-V: Independent V periodic signal input IN2 system signal input Power supply to selector or synchronous processing modules IN3-H: Independent H periodic signal input IN3-V: Independent V periodic signal input IN3 system signal input GND for selector or synchronous processing modules IN4-H: Independent H periodic signal input IN4-V: Independent V periodic signal input IN4 system signal input Connected to capacitor for holding Vsync peak IN5-H: Independent H periodic signal input IN5-V: Independent V periodic signal input IN5 system signal input Connected to capacitor for holding Hsync peak Output of composite video signal for synchronous separation Input of composite video signal for synchronous separation Pin for reference current setting (approx. 4.6V) Output of HV of either IN1 system or IN2 ? IN5 system selector signals. Signal is selected by 12C bus "YCBCR/MAT". Power supply to RGB system Sand-castle-pulse input V timing pulse input H pulse input GND for RGB system RGB signal output. When 100IRE white is inputted, signal is outputted at 2.6Vp-p. RGB AKB sample & hold I O I I I I Input of returned reference pulse Peak ABL peak-hold Creates LPF when ABL control signal is received. ABL control signal input YM1/YS1 control signal input. Input level is judged on the three-value logic. This pin enables VM to turn off when YM or YS reaches its specified value. Analog RGB1 signal input YM2/YS2 control signal input. Input level is judged on the three-value logic. This pin enables VM to turn off when YM or YS reaches its specified value. Analog RGB2 signal input 12C bus slave address input Used to connect capacitor to GND pair for detection of dynamic picture (black expansion) 12C bus SCl (serial clock) input 12C bus SDA (serial data) input Used to provide mute control to dynamic picture (black expansion) Connected to Y system clamp capacitor VM output. Differential waveform of Y signal is outputted with positive polarity. Used to turn off VM, sharpness and color. Input level is judged on the three-value logic. Input for switching signal inputted to INT/EXT SW. External input pin is selected when this input is High. External Y/Cb/Cr signal input 45 LC-30HV4E ËRH-iXA385WJZZ (ASSY:IC2510) » Pin mapping Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 Pin Name NC SP_CP2 SP_VD GND SP_HD VD3 HD3 SP_CP1 TDI TMS TCK TEXT_HD US_HD TEXT_VD Vcc3.3V US_VD GND MODEA MODEB MODEC SELA SELO SELC TDO GND Vcc3.3V VD1 HD1 PL_VD PL_HD PL_CP PL_BLK MODED NC Vcc3.3V NC CC_HD ow_vblk HDS VDS HD2 VD2 clk NC Type –– I I –– I O O I I I I O I O –– I –– I I I I I I O –– –– I I O O O O I –– –– –– O I O O I I I –– Description Non-connection Input of clamp signal from synchronous separation IC (for 15K system) Input of vertical synchronization signal from synchronous separation IC Ground Input of horizontal synchronization signal from synchronous separation IC Output of vertical synchronization signal to synchronous separation IC Output of horizontal synchronization signal to synchronous separation IC Input of clamp signal from synchronous separation IC (normal) SP data input SP mode input SP clock input TEXT_HD output RCA/TEXT horizontal synchronization signal input TEXT_VD output TEXT_VD output RCA/TEXT vertical synchronization signal input Ground Mode selection signal A Mode selection signal B Mode selection signal C Input of HD switching control signal for main video chroma/RCA Input of control signal for TEXT synchronization signal output Input of control signal for TEXT synchronization signal output ISP data output Ground Power supply Input of vertical synchronization signal from main video chroma IC Input of horizontal synchronization signal from main video chroma IC Vertical synchronization signal output Horizontal synchronization signal output Clamp signal output H blank signal output Mode selection signal D Mode selection signal D Power supply Non-connection Horizontal synchronization signal for closed caption Auto wide V blank signal input Output of horizontal synchronization signal for PC board Output of vertical synchronization signal for PC board Input of horizontal synchronization signal from sub video chroma IC Input of vertical synchronization signal from sub video chroma IC Clock input Non-connection 46 LC-30HV4E ËVHiTC90A69++1Y (ASSY:IC402) » Pin mapping Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 Pin Name BIAS VRT VDD1 TESTI1 VSS2 VRB YCIN TEST KILLER TESTI2 VDD3 VSS3 VDD2 TESTI3 SCL SDA MODE1 TESTOUT FSC VDD4 VSS4 FIL PD VB2 YOUT VSS1 COUT VB1 Type –– –– –– I –– –– I O I I –– –– –– I I I O I I –– –– I O –– O –– O –– Description ADC bias ADC upper limit bias ADC and DAC power supply (analog system) Input for testing ADC GND (analog system) Video signal input ADC lower limit bias Reset control and test control before shipping Y/C separation and vertical enhancer OFF Input for testing Power supply to logic (digital system) Logic and DRAM GND (digital system) DRAM power supply (digital system) Input for testing IIC BUS clock input IIC BUS data input MODE1 output Input for testing Clock input PLL power supply (analog system) PLL GND (analog system) VCO control PLL detection output DAC bias 2 Luminance signal output DAC GND (analog system) DAC GND (analog system) DAC bias 1 47 LC-30HV4E ËRH-iX3270CEZZ (ASSY:IC1) » Pin mapping Pin No. 34, 36-44, 46, 48-52 23-26, 28, 30-32 13-18, 20, 22 86, 84, 82, 78-72, 70-68-60, 56-53 96 98 99 100 101 102 87 118 106 119 107 108 110 112 113 116 117 89 90 91 92 93 88 105 123 11-8 12 7 160 182 159 191 114 192 115 189 190 171 164 165 172 166 167 174 168 169 170 176 104 126 103 146, 149 156 155 162 5 4 Pin Name Type Description D[15:0] I/O Data bus D [15:0] D[23:16/PTA[7:0] D[31:24/PTB[7:0] A[25:0] I/O I/O O Data bus D [23:16] / I/O port A [7:0] Data bus D [31:24] / I/O port B [7:0] Address bus A [15:0] CS0 CS2/PTK[0] CS3/PTK[1] CS4/PTK[2] CS5/CE1E/PTK[3] CS6/CE1B BS/PTK[4] RAS3U/PTE[2] RAS3L/PTJ[0] RAS2U/PTE[1] RAS2L/PTJ[1] CASLL/CAS/PTJ[2] CASLH/PTJ[3] CASHL/PTJ[4] CASHH/PTJ[5] CAS2L/PTE[6] CAS2H/PTE[3] WE0/DQMLL WE1/DQMLU/WE WE2/DQMUL/ ICIORD/PTK[6] WE3/DQMUU/ ICIOWR/PTK[7] RD/WR RD CKE/PTK[5] WAIT IRL[3:0]/IRQ[3:0]/ PTH[3:0] IRQ4/PTH[4] NMI IRQOUT WAKEUP/PTD[3] TCLK/PTH[7] DREQ0/PTD[4] DACK0/PTD[5] DREQ1/PTD[6] DACK1/PTD[7] DRAK0/PTD[1] DRAK1/PTD[0] RxD0/SCPT[0] TxD0/SCPT[0] SCK0/SCPT[1] RxD1/SCPT[2] TxD1/SCPT[2] SCK1/SCPT[1] RxD2/SCPT[4] TxD2/SCPT[4] SCK2/SCPT[5] RTS2/SCPT[6] CTS2/IRQ5/SCPT[7] CE2B/PTE[5] IOIS16/PTG[7] CE2A/PTE[[4] CAP[1:2] EXTAL XTAL CKIO EXTAL2 XTAL O O/(I/O) O/(I/O) O/(I/O) O/(I/O) O O/(I/O) O/(I/O) O/(I/O) O/(I/O) O/(I/O) O/(I/O) O/(I/O) O/(I/O) O/(I/O) O/(I/O) O/(I/O) O O O/(I/O) Chip select 0/ Chip select 2 / I/O port K [0] Chip select 3 / I/O port K [1] Chip select 4 / I/O port K [2] Chip select 5 / CE1 (area 5SPCMIA)/O port K [3] Chip select 6 / CE1 (area 6SPCMIA) Bus cycle start signal / I/O port K [4] RAS (area 3DRAM, SDRAM upper 32MB address) / I/O port E [2] RAS (area 3DRAM, SDRAM upper 32MB address) / I/O port J [0] RAS (area 2DRAM, SDRAM upper 32MB address) / I/O port E [1] RAS (area 2DRAM, SDRAM upper 32MB address) / I/O port JE [1] D7-D0 CAS (DRAM)/CAS (SDRAM) / I/O port J [2] D15-D18 CAS (DRAM) / I/O port J [3] D23-D16 CAS (DRAM) / I/O port J [4] D31-D24 CAS (DRAM) / I/O port J [5] D31-D24 CAS (DRAM) / I/O port J [5] D31-D24 CAS (DRAM) / I/O port J [5] D7-D0 selection signal/DQM (SDRAM) D7-D0 selection signal/DQM (SDRAM) D23-D16 selection signal/DQM (SDRAM)/PCMCIA I/O port K [6] O/(I/O) D31-D24 selection signal/DQM (SDRAM)/PCMCIA I/O write I/O port K [7] O O O/(I/O) I I Read/Write switch signal Read strobe CK enable (for SDRAM only) / I/O port K [5] Hardware wait request Hardware wait request I I O O/(I/O) I/O I O/(I/O) I O/(I/O) O/(I/O) O/(I/O) I O I/O I O I/O I O I/O O/(I/O) I O/(I/O) I O/(I/O) –– I O I/O I O External interrupt request / I/O port H [4] Non-maskable interrupt request Interrupt request output Standby mode interrupt request output / I/O ports D [3] TMU/RTC clock I/O / I/O port H [7] DMA request 0 / I/O port D [4] DMA ACK 0 / I/O port D [5] DMA request 0 / I/O port D [6] DMA ACK 1 / I/O port D [7] DMA ACK 1 / I/O port D [7] DMA ACK 0 / I/O port D [0] Receive data 0/SCI input port [0] Send data 0/SCI output port [0] Serial clock 0/SCI I/O port [1] Receive data 0/SCI input port [2] Send data 0/SCI output port [2] Serial clock 1/SCI I/O port [3] Receive data 0/SCI input port [4] Send data 2/SCI output port [4] Serial clock 2/SCI I/O port [5] Send request 2/SCI I/O port [6] Send clear 2/enternal interrupt request/SCI input port [7] PC card 0 chip enable 2 / I/O port E [5] Write protect/input port G [7] PC card 1 chip enable 2 / I/O port E [4] PLL external capacitor pin [1:2] External clock/crystal oscillator input Crystal oscillator output System clock I/O RTC crystal oscillator input RTC crystal oscillator output 48 LC-30HV4E » Pin mapping Pin No. 193 124 122 121 2, 1, 144 196, 195 197 194 158, 157 204-199 206, 207 177-180, 185-188 184 120, 94 136-143 127-131, 135 125 151 21, 29, 35, 47, 59, 71, 81, 85, 97, 111, 134, 154, 163, 175, 183 145, 150 3 205 19, 27, 33, 45, 57, 69, 79, 83, 95, 109, 132, 152, 153, 161, 173, 181 147, 148 6 198, 208 Pin Name RESETP RESETM BREQ BACK MD[2:0] MD[4:3] MD5 CA STATUS[1:0]/ PTJ[7:6] AN[5:0]/PTL[6:7] AN[6:7]/DA[1:0]/ PTL[6:7] PTC[7:0]/PINT[7:0] PTD[2]/RESETOUT PTE[0]/PTE[7] PTF[7:0]/PINT[15:8] PTG[6:0] PTH[5]/ADTRG PTH[6] Vcc Type Description I I I O I I I O I/O Power-on reset request Manual reset request Bus request Bus ACK Clock mode select Area 0 bus width select Endian select Chip active Processor status [1:0] / I/O port J [7:6] I I/O A/D converter input [5:0]/input port L [5:0] A/D converter input [6:7] / D/A converter output [1:0] / input port L [6:7] I/O I/O I/O I I I I –– I/O port C [7:0]/port interrupt [7:0] I/O port D [2]/reset output I/O port E [0]/I/O port E [7] I/O port E [7:0]/port interrupt [15:8] I/O port G [6:0] I/O port H [5]/analog trigger I/O port H [6] Power supply (3.3V) Vcc(PLL) Vcc(RTC) Avcc Vss –– –– –– –– Power supply (3.3V) Power supply (3.3V) Analog power supply (3.3V) Power supply (0V) Vss(PLL) Vss(TRC) Avss –– –– –– Power supply (0V) Power supply (0V) Analog power supply (0V) 49 LC-30HV4E Ë9DK001-15079 (CXA3506R) (ASSY:IC4) 3-channel, 8-bit, 120MSPS A/D converter amplifier PLL » Pin mapping Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 15 16, 94 17 18, 92 19, 32, 42, 54, 65,76,90 20, 33, 44, 55, 67, 77, 89 21, 22, 24-28, 31 23, 30, 43, 50, 59, 66,7 9, 86 29, 80 34-41 45-49, 51-53 56-58, 60-64 68-75 78, 81-85, 87,88 91 93 95 96 97 98 99 100 101 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 123 124 125 126 127 128 129 130 132 133 134 135 136 137 Pin Name Type Description B/CbOUT ADDRESS R/CrOUT NC NC XPOWERSAVE DGNDREG DVCCREG SDA SCL XSENABLE SEROUT 3WIRE/I2C AVCCADREF AVCCAD3 VRT DVCCAD3 DVCCADTTL O I O –– –– I –– –– I I I O I –– –– O –– –– Amplifier output signal monitor I2C slave addressing Amplifier output signal monitor Not used Not used Power saving Resistor GND Resistor power supply Control resistor data input Control resistor clock signal input 3-wire control resistor enable signal input 3-wire control resistor data read 12V bus mode and 3-wire bus mode select ADC reference voltage power supply ADC analog power supply ADC top reference voltage output ADC digital power supply ADC TTL output power supply DGNDADTTL –– ADC TLL output GND RA0~RA7 DGNDAD3 O –– R channel port A data output ADC digital GND AGNDAD3 RB0~RB7 BA0~`BA7 –– O O ADC analog GND R channel port B data output B channel port A data output BB0~BB7 O B channel port B data output GA0~GA7 GB0~GB7 O O G channel port A data output G channel port B data output DVCCAD VRB AGNDADREF DVCCPLLTTL DGNDPLLTTL XCLKCLK 1/2XCLK 1/2CLK DSYNC/ DIVOUT UNLOCK SOGOUT HOLD XTLOAD EVEN/ODD XCLKIN CLKIN SYNCIN1 SYNCIN2 CLPIN DVCCPLL DGNDPLL AVCCVCO AGNDVCO RC1 RC2 AVCCIR IREF AGNDIR G/YIN1 AVCCAMPG G/YIN2 AGNDAMPG G/YCLP B/CbCLP R/CrCLP SOGIN1 B/CbIN1 AVCCAMPB SOGIN2 B/CbIN2 AGNDAMPB –– O –– –– –– O O O O O O O I I I I I I I I –– –– –– –– –– –– –– I –– I –– I –– –– –– –– I I –– I I –– ADC digital power supply ADC bottom reference voltage output ADC reference voltage GND PLL TTL output power supply PLL TTL output GND CLK reverse output CLK output I2CLK reverse output I2CLK output DSYNC signal outut/DIVOUT signal output UNLOCK signal output Input of sink signal of Sink-On-Green signal Phase comparison disable signal input Programmable counter reset ADC sampling clock inverse pulse input Negative test clock input Positive test clock input Sink signal input 1 Sink signal input 2 Clamp pulse input PLL digital power supply PLL digital GND PLL VCO analog power supply PLL VCO analog GND External PLL loop filter External PLL loop filter IREF analog power supply Current input IREF analog GND G/Y signal input 1 G/Y amplifier power supply G/Y signal input 2 G/Y amplifier power supply Brightness clamp capacitor connection Brightness clamp capacitor connection Brightness clamp capacitor connection Sink-On-Green signal input 1 B/Cb signal input 1 B/Cb amplifier power supply Sink-On-Green signal input 2 B/Cb signal input 2 B/Cb amplifier GND 50 LC-30HV4E Pin No. 139 140 141 142 143 144 14, 102, 122, 131, 138 Pin Name R/CrIN1 AVCCAMPR R/CrIN2 AGNDAMPR G/YOUT DACTEST OUTDPGND Type I –– I –– O O –– Description R/Cr signal input 1 R/Cr amplifier power supply R/Cr signal input 2 R/Cr amplifier GND Amplifier output signal monitor Input for testing amplifier control resistor DAC 51 LC-30HV4E TROUBLE SHOOTING TABLE AVC System Power cannot be turned on. (The power LED on the front panel does not light up). Is the power cable connected properly? NO Plug the power cable connector and retry to turn on the power. NO Replace the fuse and retry to turn on the power. If the fuse burns, check VA701, D701 and IC701 and replace if necessary. NO Check the BU+5V line for correct impedance. (Measure the resistance between Pin 1 and GND). YES Is fuse (F701) in order? YES Is the BU+5V line (pin 1 of P1703) in order? NO Remove the cause of fault or short-circuit. YES Are the wire harness and FFC connected properly? YES Check IC1702 and its peripheral circuits. YES Does the voltage of the OVP line (pin 8 of P1702) fluctuate after power-on? NO Check connections of the wire harness and FFC and reconnect if necessary. NO Check power supply internal devices (IC701, IC72, PC702, Q702, D708 and D705). NO Check DC/DC converter output lines and MOS-FET (Q1707 and Q1708) and replace if necessary. YES Are DC/DC converter outputs and MOS-FET (Q1707 and Q1708) in order? YES Replace IC1703. The power does not turn on even through the power button is pressed. (The red power LED on the front panel does not turn green or is blinking red). Is the system cable connected properly between the Display and the AVC System (between DISPLAY OUTPUT(1)’s)? NO Reconnect and retry to turn on the power. YES Are the power switches of the Display and AVC System on? NO Turn on the power switches of the Display and AVC System. YES Are the UR+6V, UR+10V and UR+13V lines (pins 1, 2, 7 and 9 of P1702) in order? NO Is PS_ON (pin 3 of P1702) pulled high (3.5V)? YES YES NO Check the PS_ON line. YES Is the impedance of the UR+6V, UR+10V and UR+13V lines correct? (Measure the resistance between pins 1/2/7/9 of P1072) and GND). NO Check the UR+6V, UR+10V and UR+13V lines and devices on the lines. NO Are the D+1.8VCV line (pins 5 and 6 of P1701), D+3.3V line (pin 8 of P1701), D+5V line (pin 1 of P1701) and A+5V line (pin 3 of P1701) in order? Is D_POW (pins 32 and 34 of IC1703, pin 2 of IC1704 and pin 2 of IC1705) pulled high? YES YES NO Check the D_POW line (pin 6 of IC1503). Are MOS-FET (Q1707 and Q1708) and REG. IC (IC1704 and IC1705) in order? Check the wire harness and FFC for proper connection. NO YES Replace IC1703. Check each output line and replace MOS-FET (Q1707 and Q1708) and REG. IC (IC1704 and IC1705). 52 Check IC2501 (multi-sound processor) and its peripheral circuits. Check lines and devices between pins 36/37 of IC2501 and pins 1/3 of the AV unit connector (P2502). (Q2504-5, Q2509-10 and Q2513-4) NO NO Are the audio outputs of IC2501 (multi-sound processor) in order? Pins 36 and 37 of IC2501 (SC1 OUT L/R). Are audio signals applied to the AV unit connectors (pins 1 and 3 of P2502)? No sound (2) 53 No audio output <INPUT2/3> No sound (3) YES Check lines and devices between pins 27/28 of IC2501 and pins 3/1 of INPUT1. Also check the audio mute circuits. (IC2504, Q1101-2) YES Are the audio outputs of IC2501 (multi-sound processor) in order? Pins 27 and 28 of IC2501 (DRCM L/R) YES Check lines and devices between pins 43/45 of IC1301 and pins 3/1 of INPUT2/3. Also check the audio mute circuits. (IC1301, Q1104-7 and Q1109-12) NO Are the audio outputs of IC1301 (AV switch) in order? Pins 43 and 45 of IC1301 (SC1 TV SUB OUT L/R) YES Has the input mode been selected on the Input Select screen? No audio output <Input1> Check TU1101 (U/V tuner) and its peripherals. NO Are the tuner audio inputs of IC2501 (multi-sound YES Check IC2501 (multi-sound processor) and its processor) in order? peripheral circuits. Pin 67 (sound IF1) of IC2501 Pin 69 (sound IF2) of IC2501 NO YES Check B.P.F. of SIF1 and SIF2. Is the audio signal applied to tuner output pin 21? (Q1119-20 and Q1121-2) The speaker generates no sound when TV signal is received. Check audio circuits of the Display. Check peripherals of the SR unit DISPLAY OUTPUT 2 pin (SC6000). YES YES NO YES Set the monitor audio output to "Fixed". Remove the headphone. Is the monitor audio output set to "Variable"? Or Is the headphone connected? No sound is heard from the speaker in all modes. AVC System The audio level is abnormal: Is the monitor audio output set correctly? "Variable" or "Fixed" YES No sound at all: Are the audio outputs of IC2501 (Multi-sound processor) in order? Pins 34 and 33 (SC2 OUT L/R) of IC2501 YES Check lines and devices between pins 34/33 of IC2501 and the monitor output (J1101). Also check the audio mute circuit. (Q2502-3, Q1114-5 and Q1106-7) No monitor audio output or abnormal audio Check IC1301 (A switch) and its peripherals. YES Are the audio inputs of IC1301 (AV switch) in order? Input 1: Between pins 2 and 4 of IC1301 Input 2: Between pins 9 and 11 of IC1301 Input 3: Between pins 16 and 18 of IC1301 Input 4: Between pins 23 and 25 of IC1301 PC input: Between pins 29 and 31 of IC1301 NO Are the audio outputs of IC1301 (AV switch) in order? Pins 52 and 54 of IC1301 (TV MAIN OUT L/R) Are the audio input circuits of IC1301 (AV switch) in order? YES Input 1: Between pins 6/2 and pins 2/4 of IC1301 Input 2: Between pins 6/2 and pins 9/11 of IC1301 Input 3: Between pins 6/2 and pins 16/18 of IC1301 Front panel input: Between J2404 and pins 23/25 of IC1301 PC input: Between J2403 and pins 29/31 of IC1301 YES Are the audio inputs of IC2501 (multi-sound processor) in order? Pins 56 and 57 of IC2501 (SCI IN1 L/R) The speaker generates no sound when audio signals are inputted from an external device or a PC. No sound (1) LC-30HV4E NO NO 54 YES NO NO Is the Y/C signal applied to pins 24 and 262 of IC1301 (AV switch)? YES (G) Select INPUT4 Y/C on the Input Select screen. Check lines and devices between pins3/4 of INPUT1 (J2401) and pins 24/26 of IC1301. NO NO YES (F) Is the Y/C signal applied to pins 17 and 19 of IC1301 (AV switch)? No Y/C image on INPUT3 YES Has "INPUT3" been selected on the Input Select screen? YES No image (3) Is the video signal applied to pin 22 of IC1301 (AV switch)? YES (D) NO video image on INPUT4 YES Has "INPUT4" been selected on the Input Select screen? YES No image (2) Check lines and devices between pins20/15 of INPUT1 (SC1101) and pins 10/12 of IC1301. Select INPUT2 Y/C on the Input Select screen. NO NO NO NO NO Is the video signal applied to pin 8 of IC1301 NO (AV switch)? YES (B) NO video image on INPUT2 YES Has "INPUT2" been selected on the Input Select screen? YES No image (1) Check lines and devices between pin 20 of INPUT3 (SC1102 1/2) and pin 15 of IC1301. Select INPUT3 CVBS on the Input Select screen. Check lines and devices between pin 20 of INPUT1 (SC1101) and pin 1 of IC1301. Select INPUT1 CVBS on the Input Select screen. No image (4) No Y/C image on INPUT4 YES Has "INPUT4" been selected on the Input Select screen? YES <When Y/C signal is received> (E) Is the Y/C signal applied to pins 10 and 12 of IC1301 (AV switch)? No Y/C image on INPUT2 YES Has "INPUT2" been selected on the Input Select screen? YES <When Y/C signal is received> Is the video signal applied to pin 1 of IC1301 NO (AV switch)? YES (C) NO video image on INPUT3 YES Has "INPUT3" been selected on the Input Select screen? YES <When video signal is received> Is the video signal applied to pin 1 of IC1301 NO (AV switch)? YES (A) No video image on INPUT1 YES Has "INPUT1" been selected on the Input Select screen? YES AVC System <When video signal is received> Check lines and devices between pins20/15 of INPUT2 (SC1102 1/2) and pins 17/19 of IC1301. Select INPUT3 Y/C on the Input Select screen. Check lines and devices between pin 3 of INPUT4 (J2404) and pin 22 of IC1301. Select INPUT4 CVBS on the Input Select screen. Check lines and devices between pin 20 of INPUT2 (SC1102 1/2) and pin 8 of IC1301. Select INPUT2 CVBS on the Input Select screen. LC-30HV4E (B),(D),(F) YES NO NO NO 55 YES Are the main R, G and B signals sent from pins 19, 15 and 12 of FL810 respectively? YES Are the main R, G and B signals applied to pins 3, 7 and 10 of FL810 (6.7/30 MHz L.P.F.) respectively? YES Are the main R, G and B signals sent from pins 35, 37 and 39 of IC803 respectively? YES NO NO NO Are the main Y, Cb and Cr signals applied to NO pins 69, 68 and 67 of IC803 (RGB decoder) YES Are the main Y, Cb and Cr signals sent from pins 21, 22 and 23 of IC801 YES <When Y/C signal is received> Are the main Y signal and main C signal applied to pin 44 and pin 43 of IC801 (main video chroma) respectively? <When video signal is received> Are the main Y signal and main C signal applied to pin 1 (TP812) and pin 48 of IC801 (main video chroma) respectively? <Main system> Check the PC I/F unit. Check FL810 (6.7/30 MHz L.P.F.) and its peripheral circuits. YES Is cutoff frequency setting pin 17 of FL810 (6.7/30 MHz L.P.F.) pulled high? Check lines and devices between IC803 and FL810.(Q801-3 etc.) Check IC803 (RGB decoder) and its peripheral circuits. Check lines and devices between IC801 and IC803. (IC814, Q814, Q815, etc.) Check IC801 (main video chroma) and its peripheral circuits. <When Y/C signal is received> Check lines and devices between IC1301 and IC801. (Q827, Q403, Q404, etc.) <When video signal is received> Check lines and devices between IC4001 and IC801. (IC403, Q415, etc.) YES YES Are the sub R, G and B signals sent from Q901-2, Q903-4 and Q905-6 (6.7 MHz L.P.F.) respectively? YES Are the sub Y, Cb and Cr signals applied to Q901-2, Q903-4 and Q905-6 (6.7 MHz L.P.F.) respectively? YES Are the sub Y, Cb and Cr signals sent from pins 21, 22 and 23 of IC802 respectively? YES <When Y/C signal is received> Are the sub Y signal and sub C signal applied to pin 5 and pin 7 of IC802 (sub video chroma) respectively? <When video signal is received> Are the sub Y signal and sub C signal applied to pin 1 and pin 7 of IC802 (sub video chroma) respectively? <Sub system> <When video signal is received> Is the video signal applied to pin 7 of IC401 (main comb filter) and pin 7 of IC402 (sub comb filter)? <When Y/C signal is received> Are the main signal and sub signal applied to pins 44 and 43 of IC801 (main video chroma) and pins 5 and 7 of IC802 (sub video chroma) respectively? <When video signal is received> Are the main video signal and sub video signal sent from pin 56 and pin 44 of IC1301 respectively? <When Y/C signal is received> Are the main Y signal, main C signal, sub Y signal and sub C signal sent from pin 56, pin 58, pin 44 and pin 47 of IC1301 respectively? (A),(C),(E),(G) NO NO NO NO NO NO Check peripherals of Q901-2, Q903-4 and Q905-6 (6.7 MHz L.P.F.). Check lines and devices between IC802 and Q901-2/Q903-4/Q 905-6 (6.7 MHz L.P.F.). Check IC802 (sub video chroma) and its peripheral circuits. <When Y/C signal is received> Check lines and devices between IC1301 and IC802. (IC828, Q409, Q410, etc.) <When video signal is received> Check lines and devices between IC402 and IC802. (IC404, Q416-8, etc.) Check lines and devices between IC1301 and IC401/IC402/IC801/IC802. Check IC1301 (AV switch) and its peripheral circuits. LC-30HV4E 56 Check IB801 (main video chroma) and its peripheral circuits. Check lines and devices between IC801 and IC803. (IC814, Q814-5, etc.) NO NO Are the main Y, Cb and Cr signals sent from pins 21, 22 and 23 of IC801 respectively? YES Are the main Y, Cb and Cr signals applied to pins 69, 68 and 67 of IC803 respectively? YES YES Are the main R, G and Br NO signals sent from pins 35, 37 and 39 of IC803 respectively? YES Are the main R, G and Br NO signals applied to pins 3, 7 and 10 of IC810 (6.7/30 MHz L.P.F.) respectively? YES Are the main R, G and Br signals sent from pins 19, 15 NO and 12 of IC810 respectively? YES Check FL810 (6.7/30 MHZ L.P.F.) and its peripheral circuits. The cutoff frequency of FL810 (L.P.F.) is switched as follows depending on the input signals: Check lines and devices between IC803 and FL810. (Q801-3 etc.) Check IC803 (RGB decoder) and its peripheral circuits. Check lines and devices between pins 46/50/48 of IC1401 and pins 19/18/17 of IC801. Are Y, Cb and Cr signals applied NO to pins 19, 18 and 17 of IC801 (main video chroma) respectively? YES YES Are RGB signals applied to pins 9, 5 and 7 of IC1401 (AV switch)? YES NO Check lines and devices between pins 15/11/7 of INPUT3 (SC1102) and pins 9/5/7 of IC1301. Check the PC I/F unit. Status of pin 17 for setting the cutoff frequency of FL810 (6.7/30 MHz L.P.F.) <525i system>: High <525P/1125i/750P system>: Low Check lines and devices between pins34/38/36 of IC1401 and pins 5/4/3 of IC803. <Pass 525P/1125i/750P system> Are Y, Cb and Cr signals applied to pins 5, 4 and 3 of IC803 (RGB decoder) respectively? YES Are the main video signal, pass signal and sub video signal sent from pins 34, 38 and 36 of IC1401 respectively? Check lines and devices between pins 15/11/7 of INPUT1 (SC1101) and pins 63/59/61 of IC1301. YES <Main 525i system> YES Are RGB signals applied to NO pins 63, 59 and 61 of IC1401 (AV switch)? YES NO Are the sub R, G and B signals sent from Q901-2, Q903-4 and Q905-6 (6.7 MHz L.P.F.) respectively? YES NO Are the sub Y, Cb and Cr signals applied to Q901-2, Q903-4 and NO Q905-6 (6.7 MHz L.P.F.) respectively? YES Are the sub Y, Cb and Cr signals sent from pins 21, 22 and 23 of IC802 respectively? NO YES <Sub system> Are Y, Cb and Cr signals applied to pins 19, 18 and 17 of IC802 (sub video chroma) respectively? YES Check peripherals of Q9012/Q903-4/Q905-6 (6.7 MHz L.P.F.). Check lines and devices between IC802 and Q901-2/Q903-4/Q9056 (6.7 MHz L.P.F.). Check IC802 (sub video chroma) and its peripheral circuits. Check lines and devices between pins 40/44/42 of IC 1401 and pins 19/18/17 of IC802. Check IC1401 (AV switch) and its peripheral circuits. NO YES Check lines and devices between pins 8/26/17 of INPUT3 (J1101) and pins 15/17/19 of IC1301. Select INPUT3 COMPONENT on the Input Select screen. Are RGB signals applied to NO pins 5, 17 and 19 of IC1401 (AV switch)? YES NO Has "INPUT3" been selected on the Input Select screen? Select INPUT3 RGB on the Input Select screen. Has "INPUT3" been selected NO on the Input Select screen? Has "INPUT1" been selected NO on the Input Select screen? Select INPUT1 RGB on the Input Select screen. No component image on INPUT3 No RGB image on INPUT3 No image (5) No RGB image on INPUT1 <When component/RGB signal is received> AVC System LC-30HV4E Check peripherals of the tuner (TU1101) and replace if necessary. YES NO 57 NO Check IC1301 (AV switch) and its peripheral circuits. YES No image (7) Check the PC I/F unit. YES Are the sub R, G and B signals sent from Q901-2, Q903-4 and Q905-6 (6.7 MHz L.P.F.) respectively? YES Are the sub Y, Cb and Cr signals applied to Q901-2, Q903-4 and Q905-6 (6.7 MHz L.P.F.) respectively? YES Check lines and devices between pin 41 of IC1301 and monitor image output pin 20 (J1101). (Q1403 and Q1113) YES Check lines and devices between pins 39/37 of IC1301 and monitor S-OUT pins 3/4 (SC1102). (Q1401-2) YES Are Y and C signals sent from pins 39 and 37 of IC1301 (AV switch) respectively? Check IC1301 and its peripheral circuits. YES Are the sub Y, Cb and Cr signals sent from pins 21, 22 and 23 of IC802 respectively? No monitor image <S-OUT> Check FL810 (6.7/30 MHz L.P.F.) and its peripheral circuits. Is cutoff frequency setting pin 17 of FL810 (6.7/30 MHz L.P.F.) pulled high? YES Are the sub Y and C signals applied to pin 1 (TP813) and pin 48 (TP407) of IC802 (sub video chroma) respectively? <Sub system> YES Is the video signal sent from pin 4 of IC1301 (AV switch)? NO NO Check lines and devices between IC803 and FL810.(Q801-3 etc.) Check IC803 (RGB decoder) and its peripheral circuits. Check lines and devices between IC801 and IC803. (IC814, Q814, Q815, etc.) Check IC801 (main video chroma) and its peripheral circuits. Check lines and devices between IC4001 and IC801. (IC403, Q415, etc.) NO NO NO NO NO NO NO YES Is the text signal applied to pins 57, 53 and NO 55 of IC1401 (AV switch)? NO YES Is the text signal sent from pins 57, 58 and 59 of IC1601? No Monitor image <AV-OUT> Check the PC I/F unit. YES Are the main R, G and B signals sent from pins 19, 15 and 12 of FL810 respectively? YES YES Are the main R, G and B signals applied to NO pins 3, 7 and 10 of FL810 (6.7/30 MHz L.P.F.) respectively? Are the main R, G and B signals sent from pins 35, 37 and 39 of IC803 respectively? YES YES Are the main Y, Cb and Cr signals applied to pins NO 69, 68 and 67 of IC803 (RGB decoder) respectively? Are the main Y, Cb and Cr signals sent from pins NO 21, 22 and 23 of IC801 respectively? YES NO NO YES Is the video signal applied to pin 21 of IC1601 (teletext CPU)? Is the video signal applied to pin 7 of IC401 (main comb filter) and pin 7 of IC402 (sub comb filter)? Are the main Y and C signals applied to pin 1 (TP812) and pin 48 of IC801 (main video chroma) respectively? <Main system> YES YES Are the main video signal and sub video signal sent from pin 30 of IC1301 and pin 44 of IC1301 respectively? Check lines and devices between pin 5 of IC1106 and pin 63 of IC1301. YES Is the video signal applied to pin 63 of IC1301 (AV switch)? NO Is the level control signal sent from pin 1 of IC1108 to pin 8 of IC1103 (AV switch)? YES Is the video signal on pin 5 of IC1106 (level NO adj.) or TP1101? Check IC1301 and its peripheral circuits Check that input signal is S-INPUT. Check Q901-2, Q903-4 and Q905-6 (6.7 MHz L.P.F.) and their peripheral circuits. Check lines and devices between IC802 and Q901-2/Q903-4/Q905-6 (6.7 MHz L.P.F.). Check IC802 (sub video chroma) and its peripheral circuits. Check lines and devices between IC402 and IC802. (IC404, Q416-8, etc.) Check lines and devices between IC1301 and IC401/402. Check lines and devices between pins 57/58/59 of IC1601 and pins 57/53/55 of IC1301. Check IC1601 and its peripheral circuits. Check lines and devices between pin 56 of IC1301 (AV switch) and pin 21 of IC1601. Is the teletext signal received (is a teletext-supporting receiver connected to the video input terminal) and TELETEXT selected on the remote controller? NO Select TELETEXT in an appropriate manner. NO No teletext screen appears. YES Is the video signal on tuner image output pin 23? No image (6) No image when TV signal is received AVC System LC-30HV4E 58 YES Is HS/VS outputted to pins (29) and (28) of IC803, respectively? YES Is Hsync/Vsync/SCP inputted to pins (1) , (2) and (31) of IC803, respectively? YES Is PL-HD/PL-VD/PL-CP/PL-HBLK outputted to pins (34) , (35), (33) and (31) of IC1901, respectively? YES Is SP-HD/SP-VD/SP-CP inputted to pins (40) , (5) and (6) of IC1901, respectively? YES Is SP-HD/SP-VD/SP-CP outputted to pins (16) , (28) and (15) of IC604, respectively? YES Is HD3/VD3 inputted to pins (14) and (13) of IC604, respectively? YES Is HD3/VD3 outputted to pins (8) and (10) of IC1901, respectively? YES Is HD1/VD1 outputted to pins (44) and (2) of IC1901, respectively? YES Is HD1/VD1 outputted to pins (9) and (4) of IC801, respectively? <MAIN system; 15k> NO NO NO NO NO NO NO NO NO Check IC803 and its peripheral circuits. Check the circuit between pins (34)/(35)/(33)/(31) of IC1901 and pins (1)/(2)/(31) of IC803. Check IC1901 and its peripheral circuits. Check the circuit between pins (16)/(28)/(15) of IC604 and pins (40)/(5)/(6) of IC1901. Check IC604 and its peripheral circuits. Check the circuit between pins (8)/(10) of IC1901 and pins (14)/(13) of IC604. Check IC1901 and its peripheral circuits. Check the circuit between pins (9)/(4) of IC801 and pins (44)/(2) of IC1901. Check IC801 and its peripheral circuits. Check PC I/F Unit. <MAIN system; D2/D3/D4> YES NO NO NO NO NO YES Is HDS/VDS inputted to NO pins (21) and (22) of IC1901, respectively? YES Is HD2/VD2 inputted to pins (19) and (20) of IC1901, respectively? YES Is HD2/VD2 outputted to pins (9) and (4) of IC802, respectively? NO Check IC1901 and its peripheral circuits. Check the circuit between pins (9)/(4) of IC1901 and pins Check IC802 and its peripheral circuits. Check the circuit between pins (16)/(28) of IC604 and pins (40)/(5) of IC1901. Check IC604 and its peripheral circuits. Check the circuit between pins (79)/(80) of IC803 and pins (3)/(4) of IC604. Check IC803 and its peripheral circuits. <SUB system> Is SP-HD/SP-VD outputted to pins (40) and (5) of IC1901, respectively? YES Is SP-HD/SP-VD outputted to pins (16) and (28) of IC604, respectively? YES Is HD_50/VD_50 inputted to pins (3) and (4) of IC803, respectively? YES Is HD_50/VD_50 outputted to pins (79) and (80) of IC803, respectively? <MAIN system; 1080i/625P> Synchronization failure LC-30HV4E TROUBLE SHOOTING TABLE (Continued) (AVC System) YES Is digital output of IC25 normal? YES Is digital output section of IC4 normal? YES Is input at pins (124), (133) and (139) of IC4 normal? NO NO NO YES Is digital output section of IC310 normal? YES Are TL207, TL208 and TL211 normal? NO NO Check IC310 and its peripheral circuits. Check CN6 and its peripheral circuits. No SUB picture on dual screen 59 Connecting cable or monitor is problem. YES PC I/F Unit (CPCi0056CE) internal problem is likely. NO Is signal at pins (21), (22), (24), (25), (27), (28), (30) and (31) of IC413? (The signal is of high frequency (a little less than 1GHz). Pay due attention to it during observation.) Check IC25 and its peripheral circuits. Check IC4 and its peripheral circuits. Check CN6 and its peripheral circuits. No MAIN picture on single screen and dual screen. No TV, video and component picture No picture YES Is digital output of IC25 normal? YES Is digital output section of IC4 normal? YES Is input at pins (126), (136) and (141) of IC4 normal? NO NO NO No PC picture Check IC25 and its peripheral circuits. Check IC4 and its peripheral circuits. Check CN8 and its peripheral circuits. LC-30HV4E TROUBLE SHOOTING TABLE OF PC I/F UNIT (AVC System) Check power switch, AC power cable and power unit of LCD. Check system cable, power switch, AC power cable and power unit of AVC-C. Check cooling fan, IC2102 and peripheral circuits. LCD LED: OFF AVC-C LED: ON LCD LED: BLINKING (Once per second) LCD LED: BLINKING (4 times per second) 60 Check power switch, AC power cable and power unit of LCD. Check power switch, AC power cable and power unit of AVC-C. Reset the lamp error count. (See adjustment procedure.) Check Q6551, Q6554, Q6557, Q6560, Q6563, and Q6566 as well as peripheral circuits. If not successful: Check power switch, AC power cable and power unit of LCD. LCD LED never turns to green. AVC-C LED never turns to green. LCD panel backlight never lights up. Initialize EEPROM. (See adjustment procedure.) LCD LED: ON IN RED AVC-C LED: ON IN RED Check power switch, AC power cable and power unit of AVC-C. LCD LED: ON AVC-C LED: OFF No Power LC-30HV4E TROUBLE SHOOTING TABLE (Display) Check IC2201 and peripheral circuits. Check system cable, connector and peripheral circuits. Faulty: Check IC4701 and peripheral circuits. Faulty: Check IC4901 and peripheral circuits. Faulty: Check IC4551 and peripheral circuits. No signal output from pins (95), (96) and (97) of IC2201. Disconnect system cable and operate LCD independently. (Blue screen appears.) Is each pin normal at IC4701? Is each pin normal at IC4901? Is each pin normal at IC4551? 61 Faulty: Check IC3802 and IC3804 and peripheral circuits. Faulty: Check IC3805, IC3806 and IC3807 and peripheral circuits. Is signal waveform normal at IC3802 and IC3804? Is signal waveform normal at IC3805, IC3806 and IC3807? Check IC3809 and peripheral circuits. Faulty: Check Q2105 and Q2106 and peripheral circuits. Is signal waveform normal at Q2105 and Q2106? Check outputs of main unit and headphone. 2No Sound Check SC4501, -4502, -4503 and -4504 and their cables. Check system cable and connector. No 800-MHz signal input at pins (186), (187), (191), (192), (196) and (197) of IC2201. 1No Picture LC-30HV4E TROUBLE SHOOTING TABLE (Continued) (Display) LC-30HV4E CHASSIS LAYOUT (AVC System) H G F E D C B A 1 2 3 62 4 5 6 7 8 9 10 11 63 12 LC-30HV4E CHASSIS LAYOUT (Display) H G F E D C B A 1 2 3 64 4 5 6 7 8 9 10 11 65 12 LC-30HV4E SYSTEM BLOCK DIAGRAM (AVC System) H G F E D C B A 1 2 3 66 4 5 6 7 8 9 10 11 67 12 LC-30HV4E SIGNAL FLOW BLOCK DIAGRAM (AVC System) H G F E D C B A 1 2 3 68 4 5 6 7 8 9 10 11 69 12 LC-30HV4E POWER SYSTEM BLOCK DIAGRAM (AVC System) H G F E D C B A 1 2 3 70 4 5 6 7 8 9 10 11 71 12 LC-30HV4E PC I/F UNIT BLOCK DIAGRAM (AVC System) H G F E D C B A 1 2 3 72 4 5 6 7 8 9 10 11 73 12 LC-30HV4E SIGNAL BLOCK DIAGRAM (Display) CONFIG IIC H IC4902 FIFO M EM ORY IC2202 HDCP( KEY) EEP-ROM KEY IIC DDC-IIC TMDS IC4901 O S DRIV E ( ODD) IC2201 TMDS RECEIV ER SC2201 DISPLAY IN PUT 1 G Q O 0-2 3 ,QE0-23 HSYNC,V SYNC CLOCK IC2204 DDC EEP-ROM DDC5V IC4702 FIFO M EM ORY IC2203 CONFIG EEP-ROM LCD PANEL IC4701 O S DRIV E( EV EN) F IC2002 RESET IC2003 EEP-ROM IC4551 LCD CONTROL E OFL CONTROL SC2202 DISPLAY IN PUT 2 IC2001 MICRO PROCESSOR A UDIO D R/ C RECEIV ER OPC LED CONTROL KEY IC3802 SRSFORCUS A UDIO PROCESSOR C J202 SPEAKER(R) PLUG 1 Q6560 Q6563 Q6566 DC/ AC IN VERTER DRIV E T6557 T6558 T6559 T6560 T6551 T6562 DC/ AC TRANS IC3809 S-OUT A MP J3801 HEAD PHONES JA CK A T6551 T6552 T6553 T6554 T6555 T6556 DC/AC TRANS BACK LIGHT IC3803 EXTENTIO N DAC IC3804 SOUND CONTROL J201 SPEAKER(L) PLUG B Q6551 Q6554 Q6557 DC/AC IN VERTER DRIV E 2 IC3810 HEAD-PHONE A MP 3 74 4 5 6 7 8 9 10 11 75 12 LC-30HV4E POWER UNIT BLOCK DIAGRAM (Display) OPERATION LCD_ CONTROL( DIGITAL) H SW136 AC SW P131 AA IC4112 3. 3V REG IC4559 IC4560 13V REG VSH+3. 3V G IC4558 -6 VREG IC4556 5V REG IC4557 6V REG VEE-6 V DAC+5V IC4555 34V REG VLS+13V 13V PANEL IC4516 3. 3V REG B+3. 3V CONT IC4515 2. 5V REG B+2. 5V CONT 13V IC D4555 VBH+34V SIN+4V P4101 PC F INVERTER GND MAIN ( TMDS/ MICOM) FAN P2103 MB POWER INVERTER1 CN5 PC +9V FAN VCC IC2102 9V REG +13V @ E +5V P6907 MD P2106 MD INV.VCC P6557 PG AUDIO D IC2105 2. 5V REG +2. 5V IC2103 5V REG +5V +10V CN7 PE IC2104 3. 3V REG +3. 3V INVERTER2 +5V C P3801 SA +13V IC3801 9V REG B P2104 SA R/ C.LED 2 3 76 +5V _STB IC2101 5V REG P2101 PB CN4 PB +13V P2101 PA CN3 PA STB+6V STB+6V CN2 AA CN1 AC IN INV.VCC P101 RM +5V _STB 1 +13V +9V P2003 RM A P6564 PH 4 5 6 7 8 9 10 11 77 12 LC-30HV4E OVERALL WIRING DIAGRAM-1/2 (AVC system) H G F E D C B A 1 2 3 78 4 5 6 7 8 9 10 11 79 12 LC-30HV4E OVERALL WIRING DIAGRAM-2/2 (AVC system) H G F E D C B A 1 2 3 80 4 5 6 7 8 9 10 11 81 12 LC-30HV4E OVERALL WIRING DIAGRAM (Display) H G F E D C B A 1 2 3 82 4 5 6 7 8 9 10 11 83 12 LC-30HV4E DESCRIPTION OF SCHEMATIC DIAGRAM VOLTAGE MEASUREMENT CONDITION: 1. When the exclusive-use AC adapter is used, the colour bar signal of colour bar generator for service is input to get the normal screen. When the audio is minimized, the voltage value is measured with the 20 kΩ/V tester. WAVEFORM MEASUREMENT CONDITION: 1. When the exclusive-use AC adapter is used, the colour density, lightness and colour hue are set to the center position, and the signal of colour bar generator for service is observed to get waveform. 2. indicates waveform check points (See chart, waveforms are measured from point indicated to chassis ground.) INDICATION OF RESISTOR & CAPACITOR: RESISTOR 1. The unit of resistance “Ω” is omitted. (K=kΩ=1000 Ω, M=MΩ). 2. All resistors are ± 5%, unless otherwise noted. (J= ± 5%, F= ± 1%, D= ± 0.5%) 3. All resistors are Carbon type, unless otherwise noted. C : Solid W : Cement S : Oxide Film T : Special N : Metal Coating CAPACITOR 1. All capacitors are mF, unless otherwise noted. (P=pF=mmF). 2. All capacitors are Ceramic type, unless otherwise noted. (ML) : Mylar (TA) : Tantalum (PF) : Polypro Film (ST) : Styrol CAUTION: This circuit diagram is original one, therefore there may be a slight difference from yours. IMPORTANT SAFETY NOTICE: PARTS MARKED WITH “å” ( )ARE IMPORTANT FOR MAINTAINING THE SAFETY OF THE SET. BE SURE TO REPLACE THESE PARTS WITH SPECIFIED ONES FOR MAINTAINING THE SAFETY AND PERFORMANCE OF THE SET. 84 LC-30HV4E WAVEFORMS 1 2 IC1301 63-pin V: 200mV/div H: 10µsec/div 5 3 IC1301 56-pin V: 500mV/div H: 10µsec/div 6 IC803 TP801 V: 200mV/div H: 20µsec/div 9 7 IC803 TP802 V: 200mV/div H: 20µsec/div 0 IC810 13-pin V: 500mV/div H: 20µsec/div e IC803 TP803 V: 200mV/div H: 20µsec/div q IC810 11-pin V: 500mV/div H: 20µsec/div r IC2201 96-pin V: 1V/div H: 5msec/div IC405 1.2-pin V: 500mV/div H: 10µsec/div IC2201 97-pin V: 1V/div H: 5µsec/div 85 IC810 10-pin V: 500mV/div H: 20µsec/div 4 IC801 1-pin V: 200mV/div H: 10µsec/div 8 IC803 31-pin V: 1V/div H: 20µsec/div w IC2201 95-pin V: 1V/div H: 5µsec/div LC-30HV4E Ë MAIN Unit-1/6 (AVC System) H G F E D C B A 1 2 3 86 4 5 6 7 8 9 10 11 87 12 LC-30HV4E Ë MAIN Unit-2/6 (AVC System) H G F E D C B A 1 2 3 88 4 5 6 7 8 9 10 11 89 12 LC-30HV4E Ë MAIN Unit-3/6 (AVC System) H G F E D C B A 1 2 3 90 4 5 6 7 8 9 10 11 91 12 LC-30HV4E Ë MAIN Unit-4/6 (AVC System) H G F E D C B A 1 2 3 92 4 5 6 7 8 9 10 11 93 12 LC-30HV4E Ë MAIN Unit-5/6 (AVC System) H G F E D C B A 1 2 3 94 4 5 6 7 8 9 10 11 95 12 LC-30HV4E Ë MAIN Unit-6/6 (AVC System) H G F E D C B A 1 2 3 96 4 5 6 7 8 9 10 11 97 12 LC-30HV4E Ë FRONT Unit (AVC System) H G F E D C B A 1 2 3 98 4 5 6 7 8 9 10 11 99 12 LC-30HV4E Ë AV Unit-1/5 (AVC System) H G F E D C B A 1 2 3 100 4 5 6 7 8 9 10 11 101 12 LC-30HV4E Ë AV Unit-2/5 (AVC System) H G F E D C B A 1 2 3 102 4 5 6 7 8 9 10 11 103 12 LC-30HV4E Ë AV Unit-3/5 (AVC System) H G F E D C B A 1 2 3 104 4 5 6 7 8 9 10 11 105 12 LC-30HV4E Ë AV Unit-4/5 (AVC System) H G F E D C B A 1 2 3 106 4 5 6 7 8 9 10 11 107 12 LC-30HV4E Ë AV Unit-5/5 (AVC System) H G F E D C B A 1 2 3 108 4 5 6 7 8 9 10 11 109 12 LC-30HV4E Ë SR Unit (AVC System) H G F E D C B A 1 2 3 110 4 5 6 7 8 9 10 11 111 12 LC-30HV4E Ë POWER Unit-1/2 (AVC System) H G F E D C B A 1 2 3 112 4 5 6 7 8 9 10 11 113 12 LC-30HV4E Ë POWER Unit-2/2 (AVC System) H G F E D C B A 1 2 3 114 4 5 6 7 8 9 10 11 115 12 LC-30HV4E Ë PC I/F Unit-1/7 (AVC System) VD+3.3 1 2 R877 2 4 7 D51 MA157A 5 10K FLASHWP CLR_SW CLR_SW CCK CCK TXD0 R920 100 3 K2 K1A2 A1 2 K2 K1A2 A1 3 D50 MA157A 1 -RST_C1 H SDA2O SCL2 TXD2 3 3 2 CTS2 2 TV_COL1 3 TV_COL2 3 RXD2 RTS2 XPWR_SV 2 2 3 3 AGC_1 100 10K 1.8432MH 2 SH_ON 3 VD+3.3 C8 C9 R1202 0 CKIO VD+3.3 SCL4A 0.01uF C25 3 AWCS_W 7 -RST_PL 4 HVSEL D15 D D14 D13 D12 D11 D10 D9 D8 D7 D6 VD+3.3 VD+1.8 R18 2.2K(1%) R922 10K 560(1%) R17 33K IC19 D5 8 7 6 5 VCC NC NC RESET -RESET 2 C32 0.1uF C R654 150 FSTATUS CHECKER SDA2I -ROMCS 2 1 TL92 1 1 TL93 -CS0 2 TXD0_M 7 RXD0_M 7 TL94 1 0.01uF C23 TL95 VD+3.3 AWDATA 3 KOUTEI C908 3 SDA4I SDA_1 SDA3I TL96 TL97 0.1uF IC400A 1 TXD0 3 BREQ * -DEBUG 0.01uF C28 CASH CASL -WAIT_C1 5 SRESET RES_OUT3 ACL_SW SADC_OE 3 3 3 3 -RST_PLL DAC_CLK DAC_DATA 6 3 3 CASH 2 CASL FLWP RAS WXGA_OE 2 2 2 6 TL232 PAD2.0 RXD0 2 IC400B 4 TC74LVX86FT 6 5 TC74LVX86FT IC400C 9 8 TXD1 10 RXD1 TXD1_T 3 RXD1_T 3 TC74LVX86FT IC400D 12 11 13 TC74LVX86FT VD+3.3 VD+3.3 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 C31 0.1uF 0.01uF C29 D4 D3 D2 D1 D0 PST623XW C30 0.047uF 0.01uF C27 R22 10K C20 470pF C21 14 3 AWCS_R R340 10K 0.01uF 7 SCL3O SDA3O CLR_SW 14 3 LMUTE 470pF C19 7 0.01uF C22 RH-IX3270CEZZ VD+3.3 MON_DET 0.01uF C18 14 PTB6 PTB5 PTB4 PTB3 PTB2 VSS PTB1 VCC PTB0 PTA7 PTA6 PTA5 PTA4 VSS PTA3 VCC PTA2 PTA1 PTA0 VSS D15 VCC D14 D13 D12 D11 D10 D9 D8 D7 D6 VSS D5 VCC D4 D3 D2 D1 D0 R11 EXBV8V103J 7 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 SCL1_A SDA1O MON_DET SH-7709 R10 EXBV8V103J 14 PTB7 IC1 0.01uF C17 7 IRQ4 13 154 153 152 151 150 149 148 147 146 145 144 143 142 141 140 139 138 137 136 135 134 133 132 131 130 129 128 127 126 125 124 123 122 121 120 119 118 117 116 115 114 113 112 111 110 109 108 107 106 105 1 12 156 155 VCC VSS VSS PTH6 VCC CAP2 VSS VSS CAP1 VCC MD0 PTF0 PTF1 PTF2 PTF3 PTF4 PTF5 PTF6 PTF7 PTG0 VCC PTG1 VSS PTG2 PTG3 PTG4 PTG5 PTG6 PTG7 PTH5 RESETM WAIT BREQ BACK PTE0 PTE1 PTE2 PTE3 PTE6 DACK1 DACK0 PTJ5 PTJ4 VCC CASLH VSS CASLL RAS2L RAS3L CKE 1 6,7 DO_VSYNC EXTAL XTAL 5 6 7 8 IRQ2 IRQ3 VD+3.3 4 3 2 1 10 11 C13 5 6 7 8 3 CSEN1_SH 6,7 DO_HDISP 15pF 4 3 2 1 IRQ0 IRQ1 7 MON_DET 3 HPMUTE1 VS NC TC GND NMI 8 9 3 SM_RST 1 2 3 4 7 5 -C1_INT 3 SSYSTEM E R16 MD1 MD2 VCC XTAL2 EXTAL2 VSS 5 4 3 2 1 NMI 1 2 3 4 5 6 A0 A1 A2 A3 VSS A4 VCC A5 A6 A7 A8 A9 A10 A11 A12 A13 VSS A14 VCC A15 A16 A17 A18 A19 A20 A21 VSS A22 VCC A23 VSS A24 VCC A25 PTK4 RD WE0 WE1 PTK6 PTK7 RD/WR PTE7 VSS CS0 VCC CS2 CS3 CS4 CS5 CS6 CE2A CE2B C14 0.01uF 4 1 AVSS AN7 AN6 AVCC AN5 AN4 AN3 AN2 AN1 AN0 AVSS MD5 MD4 MD3 CA RESETP DREQ1 DREQ0 PTD0 PTD1 PTC0 PTC1 PTC2 PTC3 PTD2 VCC PTD3 VSS PTC4 PTC5 PTC6 PTC7 SCPT7 VCC RXD2 VSS RXD1 RXD0 RTS2 SCK2 TXD2 SCK1 TXD1 SCK0 TXD0 VCC CKIO VSS IRQOUT PTH7 PTJ7 PTJ6 1 1 2 3 4 F C12 3 2 208 207 206 205 204 203 202 201 200 199 198 197 196 195 194 193 192 191 190 189 188 187 186 185 184 183 182 181 180 179 178 177 176 175 174 173 172 171 170 169 168 167 166 165 164 163 162 161 160 159 158 157 8 7 6 5 TL89 R652 EXBV8V103J X1 6MHz 15pF 1 PSEL_1 0.01uF 3 C6 0.01uF AFT_2 AFT_1 PSEL_2 C7 -RESET 3 3 3 1.8432MH RXD1 TXD1 TL85 SDA4O R1127 10K VD+1.8 G R1106 10K R650 0.1uF CVIC2.5V 0.01uF 0.1uF RXD0 0.01uF C1 1 C2 HOTPLUG3 R921 3 AGC_2 R19 EXBV8V103J VD+3.3 R924 4.7K 5 6 7 8 C800 0.1uF R1058 4.7K 0.01uF C38 0.01uF C37 0.01uF C36 0.01uF C35 1 TL17 A25 A24 A23 A22 A15 A16 A17 A18 A19 A20 A21 0.01uF VD+3.3 EVENODD 4 VGA_OE 6 3,4 7 SDA2_5 HOTPLUG SDA1O SCL1_A VD+3.3 A[25..0] A[25..0] VD+3.3 1 2 3 4 TL230 SCL3 SDA3I VD+5 1 R1060 4.7K R1061 4.7K Q120 1 2 3 G1 S2 G2 D1 S1 D2 6 5 4 SCL3 SCL3_5 3 SDA3_5 3 1 FLS_W 3 -WR/RD 2 SDA4O SCL3O SDA3O TL99 2 5 9 12 1A 2A 3A 4A 1 4 10 13 1OE 2OE 3OE 4OE 14 2,5 -WEL 2,5 -RD 2,5 R1062 4.7K R289 4.7K IC404 TL98 -WEH R1059 4.7K C802 0.1uF 5 SCL4A 1 SDA3I VCC VD+3.3 -CS2 VD+3.3 7 7 74LVX125MTC -CS3 8 7 6 5 SDA_1 SCL1 SDA2I HOTPLUG3 -CS4 AT24C128N-10SI-2.7 A 3 6 8 11 -CS6 -CS5 C24 10uF/16V C26 0.01uF A0 VCC A1 TEST NC SCL GND SDA 1OE 2OE 3OE 4OE 14 -CS0 1 2 3 4 1 4 10 13 1Y 2Y 3Y 4Y 1 + IC3 1A 2A 3A 4A R29 EXBV8V103J REF.1XXXX B 2 5 9 12 8 7 6 5 2,5 -CS2 0.1uF -WR/RD C33 1 2 3 -RD -WEL -WEH Vcc GND OUT C532 A0 A1 A2 A3 C531 47uF/6.3V IC2 PST600IM + A14 D[15..0] A5 A6 A7 A8 A9 A10 A11 A12 A13 D[15..0] A4 2,5 0.01uF C34 IC402 1Y 2Y 3Y 4Y SCL4 SDA4I SCL3 SDA3I 3 6 8 11 VCC 74LVX125MTC TL100 NDC7002N 1 2 3 116 4 5 6 7 8 9 10 11 117 12 LC-30HV4E Ë PC I/F Unit-2/7 (AVC System) VD+3.3 X3 H 1 R40 1.8432MH 68 3 OUT VDC 2 GND Cntl 4 C42 0.01uF DSO751SV(1.8432M) VD+3.3 TL128 PAD3.5 1 VD+3.3 R27 27K R656 4 5 6 1 FLWP G 4.7K Q12 C2 B1 E1 E2 B2 C1 S1 3 2 1 SSSS812-B-2B NORMAL 3 2 1 IMB3A WRITE 1 FLASHWP 1 3 7 TC74LVX86FT 6 5 FWMODEN 2 IC53A 4 IC53B VD+3.3 TC74LVX86FT 1,5 D[15..0] F IC53D 13 TC74LVX86FT 11 12 1,5 A[25..0] IC53C TC74LVX86FT 9 VD+3.3DR D C43 C350 0.01uF 0.01uF GND GND 26 OE# WE# 28 11 RST# WP# VPP RY/BY# 12 14 13 15 NC 47 10 R33 R34 EXBV8V103J EXBV8V103J 1 2 3 4 46 27 CE# D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 D0 D1 D2 D3 D4 D5 D6 D7 8 7 6 5 VCC 29 31 33 35 38 40 42 44 30 32 34 36 39 41 43 45 R35 R36 EXBV8V103J EXBV8V103J 1 2 3 4 37 IC27 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 1 2 3 4 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 8 7 6 5 E 25 24 23 22 21 20 19 18 8 7 6 5 4 3 2 1 48 17 16 9 10 1 2 3 4 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 8 7 6 5 8 7 6 5 8 D8 D9 D10 D11 D12 D13 D14 D15 A1 A2 A3 A4 A5 A6 A7 A8 5 6 7 8 C NC NC NC NC NC NC NC R62 EXBV8V100J C807 2.2uF/50V R928 100 2 BLM21BB201SN1 1 FB51 R929 100 R930 2 BLM21BB201SN1 1 FB52 100 2 BLM21BB201SN1 1 FB53 2 11 JEY-9P-1A3F 2 BLM21BB201SN1 A17 A18 A19 A20 A21 A22 A23 A24 1 6 2 7 3 8 4 9 5 10 1 FB50 1 26 45 50 100 2 VSS VSS VSS 4 3 2 1 WE RAS LCAS UCAS OE R927 D54 D55 D56 D57 MA3120WA MA3120WA MA3120WA MA3120WA 3 11 15 16 19 20 36 40 CN5 C805 2.2uF/50V 1 0.01uF 20 19 18 17 16 15 14 13 12 11 3 0.01uF C4+ GND C4VSS STBY VCHA Dout1 Dout2 Rin1 Rin2 2 0.01uF R57 R58 EXBV8V103J EXBV8V103J VDD C1+ VCC C1C5+ C5Din1 Din2 Rout1 Rout2 1 C361 100uF/4V 17 18 35 34 33 C808 2.2uF/50V RTS2 TXD2 CTS2 RXD2 1 2 3 4 5 6 7 8 9 10 3 C53 1 1 1 1 C806 2.2uF/50V IC405 uPD4721G 2 C52 VD+3.3 C804 2.2uF/50V 1 B C51 C803 0.1uF 3 + VD+3.3 A9 A10 A11 A12 A13 A14 A15 A16 5 6 7 8 VCC VCC VCC R50 R51 EXBV8V103J EXBV8V103J 4 3 2 1 VD+3.3DR 8 7 6 5 1 D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 1 2 3 4 I G O 2 3 2 3 4 5 7 8 9 10 41 42 43 44 46 47 48 49 + 1 6 25 FL6 BLM31PG121SN1 IC28 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 + A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 + VD+3.3 21 22 23 24 27 28 29 30 31 32 + A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 + -CS0 5 6 7 8 -RD 1 4 3 2 1 1,5 4 3 2 1 R43 R44 EXBV8V103J EXBV8V103J 5 6 7 8 -RESET 4 3 2 1 1 4 3 2 1 FSTATUS 5 6 7 8 5 6 7 8 LH28F320BFE-PTTL80 1 5 6 7 8 MSM51V18165F CASH CASL RAS -WR/RD CASH CASL RAS -WR/RD R65 EXBV8V103J 4 3 2 1 1 1 1 1 A25 A 1,5 -WEL 1,5 -WEH 1 2 3 118 4 5 6 7 8 9 10 11 119 12 LC-30HV4E Ë PC I/F Unit-3/7 (AVC System) 6 6 C698 0.47uF Y_A_IN C538 C537 10uF/16V SUB_Cr K2 K1A2 A1 D80 MA157A 1.17_RB + R664 100K C543 0.1uF C762 0.1uF TL208 1 SUB_Cb 1 2 VA+5_VDO SUB_Y C700 0.47uF MAIN_VD MAIN_HD 4 4 0 R671 C766 FH12-50S-0.5SH R911 D_DATACN SH_ONCN C704 3.5V_SET IC316 R1080 R1081 100 CSEN1_SH 1 7 AGC_2 AGC_1 AFT_2 AFT_1 1 1 1 1 8 7 6 5 NJM4560M 1.2K(1%) 1 1 CLPEN CLK EXTCLP NT/PAL INIT 57 56 55 3 58 QA DVDD QB DVDD QC DVDD 14 16 35 MODE1 MODE0 4 TEST 26 DVDD 62 51 30 A AVCC B AVCC C AVCC R937 EXBV8V680J OVB0 5 4 4 OVB1 6 3 3 OVB2 7 2 2 OVB3 8 1 1 5 6 7 8 R939 EXBV8V680J OVB4 5 4 4 OVB5 6 3 3 OVB6 7 2 2 OVB7 1 8 1 5 6 7 8 R940 EXBV8V680J OVR0 5 4 4 OVR1 6 3 3 OVR2 7 2 2 OVR3 8 1 1 5 6 7 8 R941 EXBV8V680J OVR4 5 4 4 OVR5 6 3 3 OVR6 7 2 2 OVR7 1 8 1 R1099 VD+3.3 GND A GND B GND C 15 5 25 44 + C554 10uF/16V GND_VDO TLC5733A VA+5 BMK351 FL10 1 I O 3 R681 3.5V_FB 3K(1%) R680 1.8K(1%) C920 4.7uF/10V(2125) C559 4.7uF/10V(2125) 5 + 6 - IC327B 7 2 Q15 2SA1037AKQ NJM4560M R682 1.2K(1%) C768 1uF TL213 TL214 VD+5 4 VD+3.3 VA-5-AMP FB18 20 74VHCT244AMTC R1082 C741 47uF/6.3V C716 0.01uF 2 Vcc + RB521S-30 2 1 R1083 1K TV_CL1CN R1084 10K C904 0.1uF D73 IO_STB 1 2 3 4 1 2 3 4 5 6 7 LVDD VCOVDD TEST RBIAS VCOOUT VCOIN FINA VCOGND FINB VCOINH PFDOUT PFDINH LGND NC R730 A Vcc B RX/CX CLR CX GND Q 8 7 6 5 C913 C905 0.1uF(K) 1 2 3 4 TC7WH123FK 1 2 3 4 R1085 10K 22 14 13 12 11 10 9 8 C706 620 Vcc G2 Y1 A2 8 7 6 5 6 OV1_HSNF 6 C717 0.01uF TL215 0.022uF OV1_PDEN 680 C705 0.1uF(PF) 0.1uF G1 A1 Y2 GND R731 TLC2933IPW C769 4.7uF/10V(2125) 1SS400 IC419 R950 R951 EXBV8V682J EXBV8V682J 1 2 3 4 FB19 D88 10 1G 2G 8 7 6 5 8 7 6 5 1 19 VD+5BK AWCS_RCN AWCS_WCN HPMUT1CN RESO3CN LMUTECN SADC_OE5 1 1 TV_COL1 18 16 14 12 9 7 5 3 C715 0.01uF IC328 0(1/10W) VA2933_2 1Y1 1Y2 1Y3 1Y4 2Y1 2Y2 2Y3 2Y4 1A1 1A2 1A3 1A4 2A1 2A2 2A3 2A4 GND 2 4 6 8 11 13 15 17 OV1_HSNR R743 1.8K VA2933_1 4 VA+3.3AD IC408 C TL212 1.0V_FB C813 0.1uF AWCS_R AWCS_W HPMUTE1 RES_OUT3 LMUTE SADC_OE CSEN2 CSEN2 PC_V 7 4 OV1_VCLK IC420 TC7WT126FU VD+5 6 VD+5 B C814 0.1uF 20 74VHCT244AMTC 1 19 1G 2G 1Y1 1Y2 1Y3 1Y4 2Y1 2Y2 2Y3 2Y4 18 16 14 12 9 7 5 3 TV_CL2CN ACL_SWCN SRESETCN SRST SH_ONCN R1110 4.7K IC422 1 DAC_CLK 1 DAC_DATA XPWR_SVO SRST FLASH_W 4 7 7 CSEN1 7 VD+5 1 SDA2O 1 SCL2 GND 1A1 1A2 1A3 1A4 2A1 2A2 2A3 2A4 2 5 9 12 1A 2A 3A 4A 1 4 10 13 1OE 2OE 3OE 4OE 14 C916 0.1uF 1Y 2Y 3Y 4Y 3 6 8 11 R925 4.7K D_CLKCN D_DATACN SDA2_5 SDA2_5 SCL2_5 1,4 4 VCC HD74HCT125T 1 2 3 4 R955 EXBV8V682J 2 4 6 8 11 13 15 17 10 CSEN1_I 8 7 6 5 TV_COL2 ACL_SW SRESET XPWR_SV SM_RST FLS_W SH_ON Vcc IC410 1 1 1 1 1 1 1 A 1 6 OV1_VCKO OV1_CLP 0(1/10W) 1 1 1 1 1 1 OVR[7..0] 0 1 1 2 3 4 6 VA+3_VDO R947 8 7 6 5 OVB[7..0] FB16 0(1/10W) 0.1uF C558 0.1uF C553 43 42 41 40 39 38 37 36 34 5 6 7 8 2 REF NC A NC 1.0V_SET RXD1_T TXD1_T ACL_SIG K NC NC NC TL431CPS 0 0 Q13 2SC2412KQ 2 CD1 CD2 CD3 CD4 CD5 CD6 CD7 CD8 -OE C R936 EXBV8V680J OVG4 5 4 4 OVG5 6 3 3 OVG6 7 2 2 OVG7 1 8 1 1 7 7 1 8 1,4 7 SCL1_5 SDA1_5 - RT C CLPV C RB C CLP OUT C 24 23 22 21 20 19 18 17 47 5 6 7 8 3 R1132 1 2 3 4 SCL2_5 SDA2_5 SMPOW R678 + 2 C IN 29 28 33 27 BD1 BD2 BD3 BD4 BD5 BD6 BD7 BD8 -OE B DGND GA DGND QB DGND QC DGND 4 R1131 10K 1 1 3 IC327A 31 13 12 11 10 9 8 7 6 2 G CSEN1_I SCL3_5 SDA3_5 1uF VD+3.3 LMUTECN RESO3CN HPMUT1CN SCL3_5 10(1/10W) 1 1 1 1 RT B CLPV B RB B CLP OUT B 64 49 32 R912 SSYSTEM AWDATA PSEL_2 PSEL_1 VA+5_VDO 3 1 2 3 4 470 8 8 7 6 5 R677 1 R1079 D_CLKCN AWCS_WCN AWCS_RCN + 0.1uF C552 7 C550 SENCE IO_STB VA+5_VDO 0.1uF C551 7 10uF/16V 1 CSEN2 C542 10uF/16V KOUTEI 10(1/10W) + ACL_SWCN 52 53 48 54 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 -OE A 6 4 D R1077 150(1%) TV_CL2CN TV_CL1CN SRESETCN EXBV8V560J E 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 B IN 45 46 CN7 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 50 0.1uF VA+3_VDO EXBV8V560J F 100K VD+5BK FH12-30S-0.5SH RT A CLPV A RB A CLP OUT A OVG[7..0] 1 4 0.1uF C702 0.47uF R887 A IN 61 60 1 59 R934 EXBV8V680J OVG0 5 4 4 OVG1 6 3 3 OVG2 7 2 2 OVG3 8 1 1 1 MAIN_R C764 100K CR_C_IN C546 0.1uF 4 0.1uF C545 0.1uF MAIN_R D81 MA157A 4 MAIN_G C763 C544 0.1uF MAIN_G R665 K2 K1A2 A1 MAIN_B CB_B_IN TL211 VA+5_VDO 2 MAIN_VD MAIN_HD 3 MAIN_B 0 1 3 R885 TL210 1 1 1 TL209 IC310 63 0.1uF 3.27_RT 5 6 7 8 0.1uF C557 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 0 0.1uF C555 0.1uF C556 R883 3 CN6 G SADC_OE5 TL207 1 D79 MA157A 1 R1130 10K K2 K1A2 A1 R1129 10K 1 VA+5_VDO 2 OV1_V OV1_H H 2 3 120 4 5 6 7 8 9 10 11 121 12 6 6 6 LC-30HV4E Ë PC I/F Unit-4/7 (AVC System) V-5 VA+12 VA+5-AMP L1 NLC322522T-3R3M H C143 0.01uF 1 R1126 10(1/4W) + VA5REGO 3 L22 NLC322522T-3R3M VA-5-AMP D20 1SS187 C144 47uF/10V(PXA-5) VA-5-AMP 3 C757 4.7uF/10V(2125) 2 L2 NLC322522T-3R3M VA+5-PLL C80 47uF/16V 1 + VIN C81 3 VC 2 C83 0.01uF C777 0.1uF 5 0.01uF VO + C146 33uF/10V + D82 MA157A C84 33uF/10V 1 0(1/2W) GND R121 C145 0.01uF 2 IC7 PQ05TZ11 K2 K1A2 A1 VREGIN R867 0 C78 0.1uF 3 G K2 K1A2 A1 D83 MA157A 1 MAIN_R 2 3 TL225 3 C70 0.1uF D84 MA157A 1 2 3 4 3 1 0 PC_R R749 0 C562 0.1uF C563 0.1uF C565 0.1uF PC_H + C82 2Y OV0_V 6 3Y 9 4Y 12 PC_C3 6 OGOUT0 8 VA+5-AMP 3 4 VA+3.3AD R123 VA+3.3AD 3 3 XPWR_SVO 1.6K(1%) C149 R124 1K(1%) 0.01uF + C564 100uF/6.3V(PXA) VD+5 L4 BOUT0 VD+5-ADC 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 NLC322522T-3R3M ROUT0 0.01uF C96 + 47uF/6.3V C110 0.1uF 1,3 3 C SDA2_5 SCL2_5 C112 0.1uF C111 0.1uF 1 1 1 TL227 TL228 TL229 7 ROUT0 VA+5-AMP VA+3.3AD ROUT0 6 7 OGOUT0 7 BOUT0 RI1A[7..0] OGOUT0 RI1A0 RI1A1 RI1A2 RI1A3 5 6 7 8 RI1A4 RI1A5 RI1A6 RI1A7 5 6 7 8 BOUT0 B 6 C115 0.1uF R959 EXBV8V680J 5 4 4 6 3 3 7 2 2 8 1 1 5 6 7 8 C113 1uF(K) C114 0.1uF 4 3 2 1 4 3 2 1 R962 EXBV8V680J RI1B[7..0] RI1B0 RI1B1 RI1B2 RI1B3 5 6 7 8 5 6 7 8 4 3 2 1 C566 330pF(CH) C130 100pF C127 100pF C126 1uF(K) VA+5-PLL TL84 C125 0.1uF VD+5-ADC OV0_H C116 0.1uF 4 3 2 1 B/CbOUT ADDRESS R/CrOUT NC NC XPOWER SAVE DGNDREG DVCCREG SDA SCL XSENABLE SEROUT 3WIRE/IIC DPGND AVCCADREF AVCCAD3 VRT DVCCAD3 DVCCADTTL DGNDADTTL RA0 RA1 DGNDAD3 RA2 RA3 RA4 RA5 RA6 AGNDAD3 DGNDAD3 RA7 DVCCADTTL DGNDADTTL RB0 RB1 RB2 IC4 CXA3506R 108 107 106 105 104 103 102 101 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 TL83 R128 3 122 4 5 6 7 LCBI1A5 LCBI1A6 LCBI1A7 LCBI1A0 LCBI1A1 LCBI1A2 LCBI1A3 LCBI1A4 2 1 OV0_HSC2 6 OVCLK 6 1uF(K) 0.1uF C123 C121 0.1uF 0.1uF C124 OGI1B[7..0] R960 LC0GI1B7 LC0GI1B6 LC0GI1B5 LC0GI1B4 5 6 7 8 5 6 7 8 4 3 2 1 OGI1B7 OGI1B6 OGI1B5 OGI1B4 LC0GI1A7 LC0GI1A6 LC0GI1A5 LC0GI1A4 4 3 2 1 OGI1B3 OGI1B2 OGI1B1 OGI1B0 LC0GI1A3 LC0GI1A2 LC0GI1A1 LC0GI1A0 LC0GI1A7 LC0GI1A6 LC0GI1A5 5 6 7 8 5 6 7 8 4 3 2 1 BI1A[7..0] 5 6 7 8 4 3 2 1 4 3 2 1 6 BI1A7 BI1A6 BI1A5 BI1A4 C119 8 5 6 7 8 5 6 7 8 4 3 2 1 4 3 2 1 4 3 2 1 OGI1A7 OGI1A6 OGI1A5 OGI1A4 4 3 2 1 OGI1A3 OGI1A2 OGI1A1 OGI1A0 R964 5 6 7 8 5 6 7 8 4 3 2 1 EXBV8V680J BI1B[7..0] R966 LCBI1B7 LCBI1B6 LCBI1B5 LCBI1B4 5 6 7 8 5 6 7 8 4 3 2 1 4 3 2 1 BI1B7 BI1B6 BI1B5 BI1B4 4 3 2 1 BI1B3 BI1B2 BI1B1 BI1B0 6 EXBV8V680J R969 R970 LCBI1A3 LCBI1A2 LCBI1A1 LCBI1A0 5 6 7 8 EXBV8V680J EXBV8V680J 5 6 7 8 5 6 7 8 R963 LC0GI1B3 LC0GI1B2 LC0GI1B1 LC0GI1B0 OGI1A[7..0] R961 4 3 2 1 EXBV8V680J LC0GI1B0 C120 0.1uF LCBI1A7 LCBI1A6 LCBI1A5 LCBI1A4 6 LC0GI1B7 LC0GI1B6 LC0GI1B5 LC0GI1B4 LC0GI1B3 LC0GI1B2 LC0GI1B1 0.1uF 0.1uF 0.1uF EXBV8V680J 1 EVENODD VD+5-ADC LC0GI1A0 LC0GI1A1 LC0GI1A2 LC0GI1A3 LC0GI1A4 LCRI1B4 LCRI1B5 LCRI1B6 LCRI1B7 LCBI1B3 LCBI1B4 LCBI1B5 LCBI1B6 LCBI1B7 4 3 2 1 C118 4 3 2 1 C117 5 6 7 8 LCBI1B0 LCBI1B1 LCBI1B2 A 5 6 7 8 6,7 6 EXBV8V680J R968 RI1B4 RI1B5 RI1B6 RI1B7 OV0_CLP OV0_HSNR VA+3.3AD R967 VD+5-ADC 10 C122 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 R965 EXBV8V680J EVEN/ODD XTLOAD HOLD SOGOUT XUNLOCK DSYNC/DIVOUT DPGND 1/2CLK 1/2XCLK CLK XCLK DGNDPLLTTL DVCCPLLTTL AGNDADREF AVCCAD3 VRB DVCCAD3 DVCCAD DVCCADTTL DGNDADTTL GB7 GB6 DGNDAD3 GB5 GB4 GB3 GB2 GB1 AGNDAD3 DGNDAD3 GB0 DGNDADTTL DVCCADTTL GA7 GA6 GA5 TL202 1 6 144 143 142 141 140 139 138 137 136 135 134 133 132 131 130 129 128 127 126 125 124 123 122 121 120 119 118 117 116 115 114 113 112 111 110 109 GND VO VADJ 5 C79 47uF/6.3V VC VCOXHOLD 0 1 1 OV0_H 7 74LCX157MTC VI C128 0.33uF(PF) R1109 OV0_PDEN 1 1 4 R133 3K(1%) A/B G IC8 PQ20VZ11 2 R132 3.3K(1%) C131 0.1uF 1 15 1Y C132 1uF(K) 1A 1B 2A 2B 3A 3B 4A 4B C133 0.1uF HVSEL IC411 2 3 5 6 11 10 14 13 C136 0.1uF C135 0.1uF C134 0.1uF 1 TL220 C137 0.1uF 10K 3 TL219 C138 0.1uF R137 TL218 DAC TEST OUT G/YOUT AGNDAMPR R/CrIN2 AVCCAMPR R/CrIN1 DPGND AGNDAMPB B/CbIN2 SOGIN2 AVCCAMPB B/CbIN1 SOGIN1 DPGND R/CrCLP B/CbCLP G/YCLP AGNDAMPG G/YIN2 AVCCAMPG G/YIN1 AGNDIR DPGND IREF AVCCIR RC2 RC1 AGNDVCO AVCCVCO DGNDPLL DVCCPLL CLPIN SYNCIN2 SYNCIN1 CLKIN XCLKIN MAIN_VD PC_V 2 1 1SS380 1 RB3 RB4 RB5 RB6 RB7 DVCCADTTL DGNDAD3 DGNDADTTL BA0 BA1 BA2 BA3 BA4 DGNDAD3 BA5 BA6 BA7 DVCCADTTL DGNDADTTL BB0 BB1 BB2 DGNDAD3 BB3 BB4 BB5 BB6 BB7 DVCCADTTL DGNDAD3 DGNDADTTL GA0 GA1 GA2 GA3 GA4 MAIN_HD VCC 3 100 16 C907 0.1uF 1 100uF/6.3V(PXA) GND R1089 6 D78 2 VD+3.3 C921 1 VA+5 TL221 1 0 R747 PC_V PC_C D9 1SS187 D 2 R745 3 3 K2 K1A2 A1 PC_G PC_B + CLR_SW 3 S12B-PH-SM3-TB D87 MA157A 3 2 CN8 1 D86 MA157A K2 K1A2 A1 D85 MA157A E 1 MAIN_B VA+5-AMP EXBV8V103J 1 2 3 4 5 6 7 8 9 10 11 12 OV0_HSNR C62 0.1uF 3 8 7 6 5 1 PC_C 2 PC_H MAIN_HD K2 K1A2 A1 MAIN_VD 3 3 3 6 R869 0 1 F K2 K1A2 A1 2 MAIN_G R1076 1 R868 0 3 4 3 2 1 LCBI1B3 LCBI1B2 LCBI1B1 LCBI1B0 BI1A3 BI1A2 BI1A1 BI1A0 5 6 7 8 5 6 7 8 4 3 2 1 EXBV8V680J EXBV8V680J 9 10 11 123 12 6 LC-30HV4E Ë PC I/F Unit-5/7 (AVC System) 1,2 A[25..0] A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 26 25 24 139 23 138 245 22 137 244 21 136 243 342 20 135 242 341 134 241 340 431 133 240 339 430 BA_0 BA_1 BA_2 BA_3 BA_4 BA_5 BA_6 BA_7 BA_8 BA_9 BA_10 BA_11 BA_12 BA_13 BA_14 BA_15 BA_16 BA_17 BA_18 BA_19 BA_20 BA_21 BA_22 BA_23 BA_24 BA_25 D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 144 28 143 250 27 142 249 348 141 248 347 247 346 437 345 436 BD_0 BD_1 BD_2 BD_3 BD_4 BD_5 BD_6 BD_7 BD_8 BD_9 BD_10 BD_11 BD_12 BD_13 BD_14 BD_15 1 -RST_C1 1 -WAIT_C1 1 -C1_INT 211 140 246 XRESET BWAIT BINT 1 CKIO 145 BCLK 252 251 349 350 XBCS RD XBWE_0 XBWE_1 SDMODE0 SDMODE1 92 202 XCS XRAS XCAS XWE 57 170 371 274 R692 0 R694 0 XCS R693 0 XRAS VD+3.3CV XCAS R695 0 XWE R689 DQM_0 DQM_1 DQM_2 DQM_3 272 369 55 168 DQM0 DQM1 DQM2 DQM3 DQM_4 DQM_5 DQM_6 DQM_7 273 370 56 169 DQM4 DQM5 DQM6 DQM7 SDA_0 SDA_1 SDA_2 SDA_3 51 164 269 367 SDA0 SDA1 SDA2 SDA3 SDA_4 SDA_5 SDA_6 SDA_7 270 165 52 271 SDA4 SDA5 SDA6 SDA7 SDA_8 SDA_9 SDA_10 SDA_11 166 53 368 457 SDA8 SDA9 SDA10 SDA_12 SDA_13 54 167 CLK CKE /CS /RAS /CAS /WE 3 9 35 41 49 55 75 81 VccQ VccQ VccQ VccQ VccQ VccQ VccQ VccQ 6 12 32 38 46 52 78 84 VssQ VssQ VssQ VssQ VssQ VssQ VssQ VssQ 1 15 29 43 Vcc Vcc Vcc Vcc 44 58 72 86 Vss Vss Vss Vss I 295 389 388 292 SDD_72 SDD_73 SDD_74 SDD_75 SDD_8 SDD_9 SDD_10 SDD_11 376 463 375 279 SDD8 SDD9 SDD10 SDD11 SDD76 SDD77 SDD78 SDD79 386 291 385 290 SDD_76 SDD_77 SDD_78 SDD_79 SDD_12 SDD_13 SDD_14 SDD_15 278 277 173 275 SDD12 SDD13 SDD14 SDD15 SDD80 SDD81 SDD82 SDD83 82 83 194 84 SDD_80 SDD_81 SDD_82 SDD_83 SDD_16 SDD_17 SDD_18 SDD_19 69 70 181 71 SDD16 SDD17 SDD18 SDD19 SDD84 SDD85 SDD86 SDD87 85 86 197 198 SDD_84 SDD_85 SDD_86 SDD_87 SDD_20 SDD_21 SDD_22 SDD_23 72 73 74 75 SDD20 SDD21 SDD22 SDD23 D C B A SDD88 SDD89 SDD90 SDD91 90 200 301 394 SDD_88 SDD_89 SDD_90 SDD_91 SDD_24 SDD_25 SDD_26 SDD_27 383 288 287 286 SDD24 SDD25 SDD26 SDD27 SDD92 SDD93 SDD94 SDD95 480 393 392 296 SDD_92 SDD_93 SDD_94 SDD_95 SDD_28 SDD_29 SDD_30 SDD_31 285 379 378 377 SDD28 SDD29 SDD30 SDD31 SDD96 SDD97 SDD98 SDD99 472 473 387 475 SDD_96 SDD_97 SDD_98 SDD_99 SDD_32 SDD_33 SDD_34 SDD_35 276 459 372 373 SDD32 SDD33 SDD34 SDD35 SDD100 SDD101 SDD102 SDD103 476 390 556 478 SDD_100 SDD_101 SDD_102 SDD_103 SDD_36 SDD_37 SDD_38 SDD_39 460 374 461 541 SDD36 SDD37 SDD38 SDD39 SDD104 SDD105 SDD106 SDD107 192 294 191 293 SDD_104 SDD_105 SDD_106 SDD_107 SDD_40 SDD_41 SDD_42 SDD_43 281 280 177 176 SDD40 SDD41 SDD42 SDD43 SDD108 SDD109 SDD110 SDD111 189 188 187 384 SDD_108 SDD_109 SDD_110 SDD_111 SDD_44 SDD_45 SDD_46 SDD_47 175 174 62 172 SDD44 SDD45 SDD46 SDD47 SDD112 SDD113 SDD114 SDD115 391 479 481 396 SDD_112 SDD_113 SDD_114 SDD_115 SDD_48 SDD_49 SDD_50 SDD_51 464 466 380 467 SDD48 SDD49 SDD50 SDD51 SDD116 SDD117 SDD118 SDD119 395 302 201 91 SDD_116 SDD_117 SDD_118 SDD_119 SDD_52 SDD_53 SDD_54 SDD_55 381 382 469 470 SDD52 SDD53 SDD54 SDD55 SDD120 SDD121 SDD122 SDD123 199 300 299 196 SDD_120 SDD_121 SDD_122 SDD_123 SDD_56 SDD_57 SDD_58 SDD_59 186 185 184 183 SDD56 SDD57 SDD58 SDD59 SDD124 SDD125 SDD126 SDD127 298 195 297 193 SDD_124 SDD_125 SDD_126 SDD_127 SDD_60 SDD_61 SDD_62 SDD_63 182 284 180 282 SDD60 SDD61 SDD62 SDD63 CVIC2 16 71 28 59 DQM1 NC NC NC NC NC NC NC 14 21 30 57 69 70 73 V_DRAM1 3 9 35 41 49 55 75 81 VccQ VccQ VccQ VccQ VccQ VccQ VccQ VccQ 6 12 32 38 46 52 78 84 VssQ VssQ VssQ VssQ VssQ VssQ VssQ VssQ 1 15 29 43 Vcc Vcc Vcc Vcc 44 58 72 86 Vss Vss Vss Vss VD+3.3 10K O I 1 + DQM0 25 26 27 60 61 62 63 64 65 66 24 SD_BA0 SD_BA1 22 23 BA0 BA1 68 67 20 19 18 17 CLK CKE /CS /RAS /CAS /WE 3 9 35 41 49 55 75 81 VccQ VccQ VccQ VccQ VccQ VccQ VccQ VccQ 6 12 32 38 46 52 78 84 VssQ VssQ VssQ VssQ VssQ VssQ VssQ VssQ 1 15 29 43 Vcc Vcc Vcc Vcc 44 58 72 86 Vss Vss Vss Vss R698 10K V_DRAM1 IC321 DQ0 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10(AP) DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 2 4 5 7 8 10 11 13 74 76 77 79 80 82 83 85 31 33 34 36 37 39 40 42 45 47 48 50 51 53 54 56 DQM0 DQM1 DQM2 DQM3 16 71 28 59 NC NC NC NC NC NC NC 14 21 30 57 69 70 73 2 4 5 7 8 10 11 13 74 76 77 79 80 82 83 85 31 33 34 36 37 39 40 42 45 47 48 50 51 53 54 56 DQM0 DQM1 DQM2 DQM3 16 71 28 59 NC NC NC NC NC NC NC 14 21 30 57 69 70 73 SDD64 SDD65 SDD66 SDD67 SDD68 SDD69 SDD70 SDD71 SDD72 SDD73 SDD74 SDD75 SDD76 SDD77 SDD78 SDD79 SDD80 SDD81 SDD82 SDD83 SDD84 SDD85 SDD86 SDD87 SDD88 SDD89 SDD90 SDD91 SDD92 SDD93 SDD94 SDD95 DQM4 DQM5 HY57V653220BTC-7 HY57V653220BTC-7 SDA0 SDA1 SDA2 SDA3 SDA4 SDA5 SDA6 SDA7 SDA8 SDA9 SDA10 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ0 IC320 DQ1 FL95 BMK351 3 SDD32 SDD33 SDD34 SDD35 SDD36 SDD37 SDD38 SDD39 SDD40 SDD41 SDD42 SDD43 SDD44 SDD45 SDD46 SDD47 SDD48 SDD49 SDD50 SDD51 SDD52 SDD53 SDD54 SDD55 SDD56 SDD57 SDD58 SDD59 SDD60 SDD61 SDD62 SDD63 SDA0 SDA1 SDA2 SDA3 SDA4 SDA5 SDA6 SDA7 SDA8 SDA9 SDA10 25 26 27 60 61 62 63 64 65 66 24 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10(AP) SD_BA0 SD_BA1 22 23 BA0 BA1 68 67 20 19 18 17 CLK CKE /CS /RAS /CAS /WE 3 9 35 41 49 55 75 81 VccQ VccQ VccQ VccQ VccQ VccQ VccQ VccQ 6 12 32 38 46 52 78 84 VssQ VssQ VssQ VssQ VssQ VssQ VssQ VssQ 1 15 29 43 Vcc Vcc Vcc Vcc 44 58 72 86 Vss Vss Vss Vss R699 10K V_DRAM1 DQM2 DQM3 0.1uF C592 SDD72 SDD73 SDD74 SDD75 DQM0 DQM1 DQM2 DQM3 CLK CKE /CS /RAS /CAS /WE 0.1uF C591 SDD4 SDD5 SDD6 SDD7 BA0 BA1 68 67 20 19 18 17 R697 0.1uF C600 66 67 178 68 22 23 0.1uF C599 SDD_4 SDD_5 SDD_6 SDD_7 SD_BA0 SD_BA1 0.1uF C598 SDD_68 SDD_69 SDD_70 SDD_71 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10(AP) 0.1uF C597 79 190 80 81 0.1uF C575 SDD68 SDD69 SDD70 SDD71 0.1uF C581 61 63 64 65 0.1uF C590 SDD_0 SDD_1 SDD_2 SDD_3 0.1uF C589 SDD_64 SDD_65 SDD_66 SDD_67 + 0.1uF C596 289 76 77 78 SDD0 SDD1 SDD2 SDD3 0.1uF C579 SDD64 SDD65 SDD66 SDD67 V_DRAM1 1 0.1uF C576 O 25 26 27 60 61 62 63 64 65 66 24 0.1uF C583 FL94 BMK351 3 0.1uF C582 VD+3.3 SD_BA0 SD_BA1 10K SDA0 SDA1 SDA2 SDA3 SDA4 SDA5 SDA6 SDA7 SDA8 SDA9 SDA10 0.1uF C577 68 67 20 19 18 17 R696 SDD0 SDD1 SDD2 SDD3 SDD4 SDD5 SDD6 SDD7 SDD8 SDD9 SDD10 SDD11 SDD12 SDD13 SDD14 SDD15 SDD16 SDD17 SDD18 SDD19 SDD20 SDD21 SDD22 SDD23 SDD24 SDD25 SDD26 SDD27 SDD28 SDD29 SDD30 SDD31 0.1uF C586 BA0 BA1 2 4 5 7 8 10 11 13 74 76 77 79 80 82 83 85 31 33 34 36 37 39 40 42 45 47 48 50 51 53 54 56 0.1uF C585 22 23 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 G SD_BA0 SD_BA1 IC319 2 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10(AP) C574 100uF/4V 25 26 27 60 61 62 63 64 65 66 24 0.1uF C584 SDA0 SDA1 SDA2 SDA3 SDA4 SDA5 SDA6 SDA7 SDA8 SDA9 SDA10 0.1uF C578 SDA[10..0] 0.1uF C593 E 470 DQM[7..0] 0.1uF C595 -CS2 -RD -WEL -WEH 440 416 537 MCLK 0 2 1 1,2 1,2 1,2 NC3 NC2 NC1 R688 G F 179 C573 100uF/4V 1,2 D[15..0] MCLK 0.1uF C580 G IC25A 0.1uF C594 H HY57V653220BTC-7 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 2 4 5 7 8 10 11 13 74 76 77 79 80 82 83 85 31 33 34 36 37 39 40 42 45 47 48 50 51 53 54 56 DQM0 DQM1 DQM2 DQM3 16 71 28 59 NC NC NC NC NC NC NC 14 21 30 57 69 70 73 DQ0 IC322 DQ1 SDD96 SDD97 SDD98 SDD99 SDD100 SDD101 SDD102 SDD103 SDD104 SDD105 SDD106 SDD107 SDD108 SDD109 SDD110 SDD111 SDD112 SDD113 SDD114 SDD115 SDD116 SDD117 SDD118 SDD119 SDD120 SDD121 SDD122 SDD123 SDD124 SDD125 SDD126 SDD127 DQM6 DQM7 HY57V653220BTC-7 SDD[127..0] 1 2 3 124 4 5 6 7 8 9 10 11 125 12 LC-30HV4E Ë PC I/F Unit-6/7 (AVC System) D 3 OVB[7..0] 3 OV1_VCLK 3 OV1_H 3 OV1_V V1_RA0 V1_RA1 V1_RA2 V1_RA3 V1_RA4 V1_RA5 V1_RA6 V1_RA7 OVG0 OVG1 OVG2 OVG3 OVG4 OVG5 OVG6 OVG7 10 11 126 233 332 234 333 424 V1_GA0 V1_GA1 V1_GA2 V1_GA3 V1_GA4 V1_GA5 V1_GA6 V1_GA7 OVB0 OVB1 OVB2 OVB3 OVB4 OVB5 OVB6 OVB7 5 121 229 8 123 230 329 421 V1_BA0 V1_BA1 V1_BA2 V1_BA3 V1_BA4 V1_BA5 V1_BA6 V1_BA7 321 413 118 112 228 327 328 419 120 111 115 223 V1_PVDCLK V1_NVDCLK V1_VDCLK_I V1_VAL V1_HSYNC V1_VSYNC V1_CSYNC V1_GSYNC V1_HSYNC2 V1_ACT V1_PVCLK V1_NVCLK 117 3 4 119 226 325 326 417 B V1_RB0 V1_RB1 V1_RB2 V1_RB3 V1_RB4 V1_RB5 V1_RB6 V1_RB7 12 127 13 128 235 334 425 14 V1_GB0 V1_GB1 V1_GB2 V1_GB3 V1_GB4 V1_GB5 V1_GB6 V1_GB7 9 124 231 330 125 232 331 422 V1_BB0 V1_BB1 V1_BB2 V1_BB3 V1_BB4 V1_BB5 V1_BB6 V1_BB7 36 35 149 254 148 V0_VDCLK_O V0_PADCLK V0_NADCLK V0_PADRST V0_NADRST V0_CLP V0_HSYNR V0_HSYNF V0_PDEN 225 114 222 322 414 218 406 313 410 V1_VDCLK_O V1_PADCLK V1_NADCLK V1_PADRST V1_NADRST V1_CLP V1_HSYNR V1_HSYNF V1_PDEN 227 224 324 415 499 110 6 7 122 TL112 R978 R979 R980 TL113 0 0 0 DO_HSYNC DO_VSYNC DO_HDISP 7 1,7 1,7 TL122 CVIC2 PCVICPLL OV0_CLP OV0_HSNR 4 OV1_VCKO 3 R1134 47 1uF 490 A_VSS C821 0.1uF C822 0.1uF C823 0.1uF C824 0.1uF C825 0.1uF C826 0.1uF C827 0.1uF C828 0.1uF C829 0.1uF C830 0.1uF TP10 TP11 TP12 TP13 PAD1.6 PAD1.6 PAD1.6 PAD1.6 C831 0.1uF C832 0.1uF C833 0.1uF C834 0.1uF C835 0.1uF C836 0.1uF C837 0.1uF C838 0.1uF C839 0.1uF C840 0.1uF C841 0.1uF C842 0.1uF C843 0.1uF C844 0.1uF VD+5 C845 0.1uF FL205 NFM21PC105B1A3D VD+5IN 3 O I 1 + C848 0.1uF C847 100uF/6.3V VA+5 FL206 NFM21PC105B1A3D VA+5IN 3 O I 1 BIASIN_VI BIASOUT_VI BIASIN_DO BIASOUT_DO 323 575 253 351 DCLK LCLK LCLKP LCLKN 146 255 33 147 S0_D0 S0_D1 S0_D2 S0_D3 236 129 15 16 S1_D0 S1_D1 S1_D2 S1_D3 427 336 130 131 IPD 497 MCK_REF PLL_S PLL_TEST 212 487 397 + VD+3.3 C849 100uF/6.3V VD+3.3CV VD+1.8 OV1_CLP OV1_HSNR OV1_HSNF OV1_PDEN FL207 NFM21PC105B1A3D VD+1.8IN 3 O I 1 FL29 BMK351 3 O I 1 3 3 3 3 3 FL30 O BMK351 TL114 1 I C850 1 + VD+3.3IN VD+3.3 FL208 NFM21PC105B1A3D 3 O I 1 100uF/6.3V(PXA) + C366 100uF/6.3V(PXA) C851 FL98 33(1/10W) DCLKIN + CN9 S13B-PH-SM3-TB 1 1 2 2 3 3 4 4 5 5 6 6 7 7 8 8 9 9 10 10 11 11 12 12 13 13 V-5 100uF/6.3V(PXA) LCLK 3 7 VGA_OE C852 1 VD+3.3 47uF/6.3V 3 OUT VDC 4 2 GND Cntl 1 + DSO751SV(25.175M) R1128 47 C919 0.01uF 303 418 500 518 IMODE INITO INITI CPUS_0 CPUS_1 CPUS_2 CPUS_3 CCS_0 CCS_1 34 17 335 132 239 238 237 19 18 FL110 0(1/10W) 3 -RST_PLL 1 FL31 BMK351 3 O I 1 DCLKXTAL 1 R1135 10K 3 OUT VDC 4 2 GND Cntl 1 3 FL32 O BMK351 C759 0.01uF 91.3M I 1 C853 0.01uF C10 10uF(3225) + C15 10uF(3225) C367 100uF/6.3V(PXA) VD+3.3CV WXGA_OE 1 VD+3.3 X4 R1201 100 3 126 VD+2.5CV X5 3 OUT VDC 4 2 GND Cntl 1 DSO751SV(25.000M) 2 VD+5BK C854 47uF/16V VD+1.8 VD+3.3 MST XTST SMCK XSM VA+12 X6 A 1 A_VDD C846 4,7 4 OV0_PDEN 491 C820 0.1uF G 108 217 411 496 109 319 219 220 DO_HSYNC DO_VSYNC DO_HDISP DO_VDISP DO_FEILD TL222 C819 0.1uF 2 3 OVG[7..0] CVIC2 OVR0 OVR1 OVR2 OVR3 OVR4 OVR5 OVR6 OVR7 DO_BB0 DO_BB1 DO_BB2 DO_BB3 DO_BB4 DO_BB5 DO_BB6 DO_BB7 DO_BB8 DO_BB9 C818 0.1uF G 4 OV0_HSC2 10K C817 0.1uF 2 R977 366 365 268 163 50 364 267 162 49 48 C816 0.1uF G V0_PVDCLK V0_NVDCLK V0_VDCLK_I V0_VAL V0_HSYNC V0_VSYNC V0_CSYNC V0_GSYNC V0_HSYNC2 V0_ACT V0_PVCLK V0_NVCLK VDDH VDDH VDDH VDDH VDDH VDDH VDDH VDDH VDDH VDDH VDDH VDDH VDDH VDDH VDDH VDDH VDDH VDDH VDDH VDDH VDDH VDDH VDDH VDDH VDDH VDDH VDDH VDDH VDDH VDDH VDDH VDDH VDDH VDDH VDDH 171 337 343 420 423 426 428 429 432 434 435 438 439 441 442 444 447 450 453 454 456 458 462 465 468 471 474 477 483 486 489 492 495 498 560 C815 0.1uF 2 320 412 494 216 105 106 215 316 107 409 113 221 452 363 266 161 451 362 265 160 47 46 504 505 508 509 512 513 516 517 523 524 527 528 531 532 535 536 542 543 546 547 550 551 554 555 561 562 565 566 569 570 573 574 G V0_BB0 V0_BB1 V0_BB2 V0_BB3 V0_BB4 V0_BB5 V0_BB6 V0_BB7 DO_GB0 DO_GB1 DO_GB2 DO_GB3 DO_GB4 DO_GB5 DO_GB6 DO_GB7 DO_GB8 DO_GB9 VDDL VDDL VDDL VDDL VDDL VDDL VDDL VDDL VDDL VDDL VDDL VDDL VDDL VDDL VDDL VDDL VDDL VDDL VDDL VDDL VDDL VDDL VDDL VDDL VDDL VDDL VDDL VDDL VDDL VDDL VDDL VDDL 2 402 309 208 401 308 207 98 97 8 7 6 5 R976 EXBV8V330J BSI6 8 1 1 BSI7 7 2 2 BSI8 6 3 3 BSI9 5 4 4 7 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS G BI1B0 BI1B1 BI1B2 BI1B3 BI1B4 BI1B5 BI1B6 BI1B7 R975 EXBV8V330J BSI2 8 1 1 BSI3 7 2 2 BSI4 6 3 3 BSI5 4 5 4 BSI[9..2] IC25C 1 2 29 30 31 32 58 59 60 87 88 89 116 283 338 344 352 353 433 443 455 482 484 501 502 503 506 507 510 511 514 515 519 520 521 522 525 526 529 530 533 534 538 539 540 544 545 548 549 552 553 557 558 559 563 564 567 568 571 572 576 2 V0_GB0 V0_GB1 V0_GB2 V0_GB3 V0_GB4 V0_GB5 V0_GB6 V0_GB7 8 7 6 5 7 G 398 305 204 95 304 203 94 93 361 264 159 449 360 263 158 45 157 44 5 6 7 8 R974 EXBV8V330J OGSI6 5 4 4 OGSI7 6 3 3 OGSI8 7 2 2 OGSI9 8 1 1 OGSI[9..2] 2 OGI1B0 OGI1B1 OGI1B2 OGI1B3 OGI1B4 OGI1B5 OGI1B6 OGI1B7 DO_RB0 DO_RB1 DO_RB2 DO_RB3 DO_RB4 DO_RB5 DO_RB6 DO_RB7 DO_RB8 DO_RB9 R973 EXBV8V330J OGSI2 8 1 1 OGSI3 7 2 2 OGSI4 6 3 3 OGSI5 4 5 4 G V0_RB0 V0_RB1 V0_RB2 V0_RB3 V0_RB4 V0_RB5 V0_RB6 V0_RB7 4 OV0_H 4 OV0_V 4 PC_C3 3 OVR[7..0] C 103 314 407 405 312 102 210 101 448 359 262 358 261 156 43 260 155 42 8 7 6 5 2 E RI1B0 RI1B1 RI1B2 RI1B3 RI1B4 RI1B5 RI1B6 RI1B7 DO_BA0 DO_BA1 DO_BA2 DO_BA3 DO_BA4 DO_BA5 DO_BA6 DO_BA7 DO_BA8 DO_BA9 R972 EXBV8V330J RSI6 5 4 4 RSI7 6 3 3 RSI8 7 2 2 RSI9 8 1 1 7 G 4 OVCLK V0_BA0 V0_BA1 V0_BA2 V0_BA3 V0_BA4 V0_BA5 V0_BA6 V0_BA7 5 6 7 8 RSI[9..2] 2 4 BI1B[7..0] 404 311 488 403 310 209 100 99 446 357 445 356 259 154 41 258 153 40 R971 EXBV8V330J RSI2 5 4 4 RSI3 6 3 3 RSI4 7 2 2 RSI5 8 1 1 1 F BI1A0 BI1A1 BI1A2 BI1A3 BI1A4 BI1A5 BI1A6 BI1A7 DO_GA0 DO_GA1 DO_GA2 DO_GA3 DO_GA4 DO_GA5 DO_GA6 DO_GA7 DO_GA8 DO_GA9 5 6 7 8 2 4 OGI1B[7..0] V0_GA0 V0_GA1 V0_GA2 V0_GA3 V0_GA4 V0_GA5 V0_GA6 V0_GA7 355 354 257 152 39 256 151 38 150 37 2 4 RI1B[7..0] 485 400 307 206 96 399 306 205 DO_RA0 DO_RA1 DO_RA2 DO_RA3 DO_RA4 DO_RA5 DO_RA6 DO_RA7 DO_RA8 DO_RA9 1 G OGI1A0 OGI1A1 OGI1A2 OGI1A3 OGI1A4 OGI1A5 OGI1A6 OGI1A7 IC25B 1 4 BI1A[7..0] V0_RA0 V0_RA1 V0_RA2 V0_RA3 V0_RA4 V0_RA5 V0_RA6 V0_RA7 1 4 OGI1A[7..0] 104 213 214 315 408 493 317 318 1 H RI1A0 RI1A1 RI1A2 RI1A3 RI1A4 RI1A5 RI1A6 RI1A7 + 4 RI1A[7..0] 4 5 C697 0.01uF 6 7 8 9 10 11 127 12 LC-30HV4E Ë PC I/F Unit-7/7 (AVC System) L101 FL201 1 VD+5BK C856 C857 2 + L100 82pF 0.1uF TXD0_M RXD0_M SMPOW SENCE EXBV8V560J R1102 5 4 6 3 7 2 8 1 O BLM31PG121SN1 1 1 3 3 1 I 2 CSEN1CN CSEN2CN 5 6 7 8 3 FL200 G CN1 R1101 CSEN1 CSEN2 SRST FLASH_W 3 3 3 3 0(3216) 4 3 2 1 SRSTCN FLASHWCN CCKM TXD0CN RXD0CN SMPOWCN SENCECN EXBV8V560J C858 C859 82pF 0.1uF 2 + G C863 82pF CN3 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 C872 0.1uF 6 5 4 C864 82pF V_SII PQ1R33 C868 + C867 0.1uF 10uF/16V 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 OGSI5 OGSI4 OGSI3 OGSI2 C869 0.1uF BSI9 BSI8 6 BSI7 BSI6 BSI5 BSI4 BSI3 BSI2 E LCLK PVCC2 D11 D10 D9 D8 D7 D6 IDCKIDCK+ D5 D4 D3 D2 D1 D0 GND C874 DV_TXDC+ AGND TX2+ TX2AVCC TX1+ TX1AGND TX0+ TX0AVCC TXC+ TXCAGND EXT_SWING PVCCI PGND1 IC413 SiI170 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 C865 82pF DV_TXD2+ DV_TXD2DV_TXD1+ DV_TXD1- C870 82pF DV_TXD0+ DV_TXD0- 2 4 6 8 10 12 14 16 18 20 22 24 C2 C4 C6 DV_TXD2+ DV_TXD1+ R1104 100 DV_TXD0+ HOTPLUG 1 DV_TXDC- VD+5 FL204 VD+5DVI 74320-1007 3 O I 1 BMK351 DV_TXDC+ DV_TXDCR999 510 C875 C876 82pF 0.1uF VD+5BK 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 82pF TP4 DV_TXD0- R1000 R1001 VD+3.3 TESTPIN 1 TL223 PAD1.6 TL224 PAD1.6 DO_HDISP DO_HSYNC DO_VSYNC MON_DET -RST_PL SCL1 SDA_1 1 2 3 R1002 R1003 1 1,6 6 1,6 1 1 1 1 1 R1007 R1008 1K TL231 PAD1.6 1.8K Q102 100 100 VD+3.3 D 1 2 VIN GND1 VO D2D2+ D2/4SH D4D4+ DDC_CLK DDC_DATA AVSYN D1D1+ D1/3SH D3D3+ +5V GND HOTPD D0D0+ D0/5SH D5D5+ CLKSH CLK+ CLKRED GREEN BLUE AHSYNC AGND AGND H2 VC GND NR PGND2 D12/DUAL D13/MASI D14/SYNCO D15 D16 D17 D18 D19 D20 D21 D22 D23 GND RESERVED VCC 1 2 3 VCC DE VREF HSYNC/SYNC1 VSYNC DK3 DK2/MDA DK1/MCL EDGE/CHG PD MSEN VCC ISEL/RST DSEL/SDA BSEL/SCL GND 3 2 HOOK1 D75 1SS187 HOOK2 1 3 5 7 9 11 13 15 17 19 21 23 C1 C3 C5 1 IC412 CCK V_SII_VA DV_TXD1VD+3.3 33K SM15B-SRSS-TB DV_TXD2VD+5 R1011 R1012 1K V_SII_VD F Q103 2SC2412KQ 2 R1009 2.2K G BSI[9..2] CCKM H1 6 R1006 2.2K RSI2 RSI3 RSI4 RSI5 RSI6 RSI7 RSI8 RSI9 RSI[9..2] OGSI[9..2] FWMODEN C860 10uF/16V OGSI6 OGSI7 OGSI8 OGSI9 6 6 VD+5 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 3 C855 1 I O BLM31PG121SN1 10uF/16V 3 0(3216) H G VD+3.3 G1 S2 G2 D1 S1 D2 1.8K 6 5 4 SCL1_5 3 SDA1_5 3 NDC7002N C879 82pF 1K C ROUT0 4 OGOUT0 4 BOUT0 4 B R1042 1K R1043 1K R1044 1K A 1 2 3 128 4 5 6 7 8 9 10 11 129 12 LC-30HV4E Ë LCD CONTROL Unit-1/5 (Display) H G F E D C B A 1 2 3 130 4 5 6 7 8 9 10 11 131 12 LC-30HV4E Ë LCD CONTROL Unit-2/5 (Display) H G F E D C B A 1 2 3 132 4 5 6 7 8 9 10 11 133 12 LC-30HV4E Ë LCD CONTROL Unit-3/5 (Display) H G F E D C B A 1 2 3 134 4 5 6 7 8 9 10 11 135 12 LC-30HV4E Ë LCD CONTROL Unit-4/5 (Display) H G F E D C B A 1 2 3 136 4 5 6 7 8 9 10 11 137 12 LC-30HV4E Ë LCD CONTROL Unit-5/5 (Display) H G F E D C B A 1 2 3 138 4 5 6 7 8 9 10 11 139 12 LC-30HV4E Ë MAIN Unit-1/3 (Display) H G F E D C B A 1 2 3 140 4 5 6 7 8 9 10 11 141 12 LC-30HV4E Ë MAIN Unit-2/3 (Display) H G F E D C B A 1 2 3 142 4 5 6 7 8 9 10 11 143 12 LC-30HV4E Ë MAIN Unit-3/3 (Display) H G F E D C B A 1 2 3 144 4 5 6 7 8 9 10 11 145 12 LC-30HV4E Ë AUDIO Unit-1/2 (Display) H G F E D C B A 1 2 3 146 4 5 6 7 8 9 10 11 147 12 LC-30HV4E Ë AUDIO Unit-2/2 (Display) H G F E D C B A 1 2 3 148 4 5 6 7 8 9 10 11 149 12 LC-30HV4E Ë INVERTER-1 Unit (Display) H G F E D C B A 1 2 3 4 150 5 6 LC-30HV4E Ë INVERTER-2 Unit (Display) H G F E D C B A 1 2 3 4 151 5 6 LC-30HV4E Ë INVERTER GROUND Unit (Display) H G F E D C B A 1 2 3 152 4 5 6 7 8 9 10 11 153 12 LC-30HV4E Ë OPERATION Unit (Display) H G F E D C B A 1 2 3 4 154 5 6 LC-30HV4E Ë SPEAKER-L Unit (Display) H G F E Ë SPEAKER-R Unit (Display) D C B A 1 2 3 4 155 5 6 LC-30HV4E Ë POWER Unit (Display) H G F E D C B A 1 2 3 156 4 5 6 7 8 9 10 11 157 12 LC-30HV4E Ë R/C, LED Unit (Display) H G F E D C B A 1 2 3 4 158 5 6